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d-Matrix

Senior Manager, Information Security - Santa Clara, United States

d-Matrix Santa Clara, United States Full-time 10 days ago
Digital Design & SoC Architecture

Originally posted 30 September 2026 by the employer.

Protect proprietary chip design IP and EDA workflows at d-Matrix.

About the role

As the first dedicated Information Security hire, the Senior Manager, Information Security will build a unified security function, consolidating security responsibilities across the company. This role focuses on protecting proprietary chip design IP, EDA workflows, the software supply chain, internal AI agents, and corporate, cloud, and lab infrastructure.

What you'll do

- Build and execute a unified security roadmap and budget across corporate IT, cloud, and product development, consolidating tools and managing security vendors. - Partner with IT and SRE to mature identity governance, endpoint detection and response, vendor risk management, and incident response, and lead readiness for compliance programs such as SOC 2 Type II and ISO/IEC 27001. - Protect chip design IP (RTL, GDSII), EDA workflows, and software source through least-privilege access, network segmentation, exfiltration controls, and encrypted transfer to foundry and OSAT partners. - Partner with hardware teams to assess foundry, component-sourcing, and logistics risk and co-architect hardware roots of trust, unique chip identifiers, and secure boot. - Establish trusted software supply chain practices, including SBOMs, signed builds, and provenance tracking for compilers, runtimes, and model artifacts. - Secure cloud, colocation, on-premises, API, and customer-facing inference environments by enforcing Zero Trust, phishing-resistant MFA, and DevSecOps practices.

What you'll need

- 7+ years of experience in information security. - 3+ years of experience leading security programs or teams. - Technical literacy across corporate IT (RBAC, MDM, SIEM), cloud environments (Kubernetes), and CI/CD security. - Experience protecting IP-intensive engineering environments, such as semiconductor, hardware, defense, or other sensitive design and source data. - Practical understanding of how LLMs and autonomous AI agents operate, interact with APIs, and handle sensitive data. - Bachelor's degree or equivalent experience.

Nice to have

- Direct experience managing semiconductor or hardware supply chain security, such as foundry/OSAT relationships, secure IP transfer, hardware roots of trust, or anti-counterfeiting measures. - Experience securing hybrid, colocation, or on-premises lab infrastructure alongside cloud environments. - Experience managing compliance audits from initial readiness through SOC 2 Type II or ISO 27001 certification. - Active industry credentials, such as CISSP, CISM, or specialized AI/cloud security certifications.

Skills: chip design IP, EDA workflows, hardware roots of trust, secure boot, software supply chain practices

Market context

This role has been open 9 days — well below the 58-day median for Hardware Security Engineering roles.

Hardware Security Engineering · Hardware Security

Open roles in category
180
Median days open
58 d
Median salary
$226k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How d-Matrix compares in Hardware Security Engineering hiring
Metric d-Matrix All employers we track in this specialty (180 roles · 48 employers)
Open roles in this specialty 1 180
Median days open 9 d 58 d (−49 d vs this employer)
Median salary (USD postings) — $226k

Skills observed across this category: chip design IP, EDA workflows, hardware roots of trust, secure boot, software supply chain practices

Who's hiring in this category

  • NVIDIA · 26 open roles · median 29 d
  • NXP Semiconductors · 23 open roles · median 100 d
  • Qualcomm · 20 open roles · median 107 d
  • Arm Holdings · 13 open roles · median 94 d
  • STMicroelectronics · 12 open roles · median 12 d
  • AMD · 8 open roles · median 36 d

How we counted: 180 open Hardware Security Engineering (Hardware Security) roles from 48 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Apply now
Santa Clara, United States
On-site
Full-time
10 days ago

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