Senior Manager, Analog Methodology & AI Innovation - 19052
Originally posted 6 October 2026 by the employer.
About the role
This role involves providing clear ownership for analog and adjacent-domain methodology areas and acting as the focal point for customer-driven methodology requirements and integration challenges within the Silicon IP business.
What you'll do
- Provide clear ownership for analog and adjacent-domain methodology areas.
- Act as the focal point for customer-driven methodology requirements and integration challenges.
- Improve coordination across product teams and adjacent engineering organizations, including engagement with customers and foundries.
- Support methodology for application-optimized IP and special-purpose silicon.
- Manage analog design and/or analog methodology resources, with accountability for staffing, methods, budgets, schedules, and results.
- Address complex issues and implement policies and evaluation criteria that support broader business change when necessary.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a similar technical field.
- 18-25 years of experience in IC design with a BSEE degree, or 15-18 years with an MSEE or PhD.
- Extensive knowledge of analog design methodology, simulation methodology, and other mixed-signal methodology domains.
- Strong command of transistor-level design, CMOS fundamentals, reliability effects, and SPICE-based verification.
- Experience running analog design methodology execution for special-purpose silicon.
- Depth in adjacent analog methodology areas to represent work with partner teams.
Nice to have
- MSEE or PhD preferred.
Skills: Analog Methodology, circuit-to-layout, simulation methodology, mixed-signal workflows, AI Innovation
This role has been open 3 days — well below the 81-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
690
|
Median days open
81 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (690 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 61 | 690 |
| Open roles in the wider Physical Implementation family | 100 | 1470 · 107 employers |
| Median days open | 38 d | 81 d (−43 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: Analog Methodology, circuit-to-layout, simulation methodology, mixed-signal workflows, AI Innovation
Who's hiring in this category
- Cadence Design Systems · 160 open roles · median 169 d
- Synopsys (this employer) · 61 open roles · median 38 d
- Micron Technology · 42 open roles · median 91 d
- Qualcomm · 42 open roles · median 62 d
- NVIDIA · 41 open roles · median 75 d
- GlobalFoundries · 31 open roles · median 52 d
How we counted: 690 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.