Originally posted 29 September 2026 by the employer.
About the role
Mueon is seeking a Senior Interconnect & Fabric Architect / Engineer to define and implement the connectivity architecture for SoC and datacenter platforms. This hands-on role spans chip-to-chip interfaces, system fabrics, switching, networking, performance modeling, and RTL implementation.
What you'll do
- Define interconnect and fabric architectures spanning SoC, package, board/tray, rack, and datacenter systems.
- Develop specifications for topology, switching, routing, flow control, QoS, ordering, congestion management, reliability, and system management.
- Architect and integrate switches, bridges, adapters, and protocol conversion across multiple interface and fabric domains.
- Model bandwidth, latency, traffic patterns, congestion, utilization, and scaling behavior to guide architectural decisions.
- Develop or guide RTL implementation of interconnect, switching, and fabric components using Verilog/SystemVerilog.
- Enable and validate fabric architectures across simulation, FPGA, emulation, and silicon environments while defining hardware/firmware interfaces for telemetry, configuration, and error handling.
What you'll need
- B.S., M.S., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
- 8+ years of experience in interconnect, networking, fabric, SoC, or system architecture.
- Experience with high-speed interfaces and protocols such as UCIe, PCIe/CXL, AXI/CHI, Ethernet, or similar technologies.
- Strong understanding of switching, routing, bridges, adapters, flow control, and fabric architectures.
- Experience with RTL design and simulation using Verilog/SystemVerilog.
- Strong programming, modeling, or performance-analysis skills using C++, Python, SystemC, or similar environments.
Nice to have
- Experience with datacenter-scale systems, AI/ML infrastructure, or high-performance computing platforms.
- Experience with scale-up and scale-out network architectures.
- Experience with technologies such as InfiniBand, RoCE, Ethernet, NVLink/NVSwitch, PCIe/CXL, or UCIe.
- Experience designing or evaluating network topologies such as Clos, fat-tree, mesh, torus, or hierarchical fabrics.
- Experience with NICs, DPUs, switches, retimers, bridges, or other high-speed connectivity components.
- Experience with FPGA or hardware-emulation platforms.
Skills: fabric architecture, interconnect, switching, routing, performance modeling
More semiconductor jobs: SoC design jobs · Hillsboro jobs
First seen in our index 0 days ago, well below the 82-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
486
|
Median days since first seen
82 d
|
Category median salary (all employers)
$230k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Mueon | All employers we track in this specialty (486 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 486 |
| Open roles in the wider Digital Design & Verification family | 8 | 3506 · 120 employers |
| Median days since first seen | 0 d | 82 d (+82 d vs this employer) |
| Median salary (USD postings) | n/a | $230k |
Skills observed across this category: fabric architecture, interconnect, switching, routing, performance modeling
Who's hiring in this category
- Qualcomm · 79 open roles · median 92 d
- NVIDIA · 67 open roles · median 84 d
- AMD · 39 open roles · median 71 d
- Arm Holdings · 29 open roles · median 14 d
- Apple · 28 open roles · median 15 d
- Micron Technology · 20 open roles · median 114 d
How we counted: 486 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.