Senior IC Layout design Engineer - CA, San Jose, United States
Originally posted 8 October 2026 by the employer.
Join the AMD SerDes Technology Group to develop high-performance, multi-protocol wireline transceivers.
About the role
This role involves the development of SerDes solutions to facilitate the future connectivity of AMD CPU and GPU products.
What you'll do
- Layout design of high speed and high performance SerDes analog mixed signal circuit.
- Perform block level physical implementation including floor-planning, power distribution network, clock and signal routing, and analog and mixed signal transistor level layout.
- Participate in post-layout circuit performance analysis.
- Participate in block, IP, and chip level integration activities.
- Estimate realistic schedule, track, and report progress and status.
- Drive layout productivity improvement initiatives, including pcell development and automation.
What you'll need
- IC layout working experience or a Bachelor degree in EE/CE or IC layout training Certificate.
- Experience in high speed layout design.
- Experience with physical design verifications (LVS/DRC/ERC/ANT/ESD).
- Ability to work closely with remote design teams.
Nice to have
- Layout design experience in lower process nodes (7nm or below).
- Understanding of analog and mixed signal layout fundamentals, IR, EM, self and coupling capacitances, RC delay, and self-heating.
- Understanding of high speed critical signal routing and shielding.
- Familiarity with circuit design concepts/flows and IC manufacturing processes.
- Experience in layout of high-speed SerDes blocks and PLLs in advanced Fin-FET process.
- Experience with digital on top integration flow or digital SOC flow.
- Experience with Cadence SKILL and other programming (Perl, Python, Tcl).
Skills: SerDes, high speed layout, analog mixed signal circuit, Fin-FET process, LVS/DRC/ERC
This role has been open 0 days — well below the 76-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
244
|
Median days open
76 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (244 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 31 | 244 |
| Open roles in the wider Analog & Mixed-Signal family | 41 | 1419 · 106 employers |
| Median days open | 36 d | 76 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: SerDes, high speed layout, analog mixed signal circuit, Fin-FET process, LVS/DRC/ERC
Who's hiring in this category
- AMD (this employer) · 32 open roles · median 36 d
- Synopsys · 29 open roles · median 24 d
- Cadence Design Systems · 19 open roles · median 182 d
- Qualcomm · 18 open roles · median 60 d
- Micron Technology · 13 open roles · median 69 d
- Apple · 12 open roles · median 10 d
How we counted: 244 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 48 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.
Similar Jobs
Senior Design Engineer - Milpitas, CA, United States
Diodes Incorporated · Milpitas, CA, United States
Applied Scientist, Superconducting Digital and Cryogenic Control Electronics,Center for Quantum Computing, Physical Design and Simulation, Enabling Technologies
Amazon · San Francisco, California, United States