Senior Hardware System Validation Engineer - CA, Santa Clara, United States
$168,000 - $322,000 USD yearly
Originally posted 22 September 2026 by the employer.
About the role
This role involves leading HW validation activities within the Datacenter Systems Engineering team, collaborating with various stakeholders to ensure optimal product validation and test coverage.
What you'll do
- Develop and extend existing test strategies to ensure functional and performance quality.
- Design and develop software to automate the verification of Data Center Scale infrastructure components.
- Validate distributed Storage systems (e.g., Lustre) on AI/HPC Datacenter scale infrastructure.
- Collaborate with multi-functional teams to debug HW/SW product issues.
- Debug, triage issues, perform root cause analysis, and verify fixes.
- Analyze and root-cause issues to the code level and manage the defect fixing process.
What you'll need
- MSEE/MSCE or equivalent experience.
- 10+ years of validation experience.
- Over 5 years of proven experience in Software Quality Engineering & Storage system verification.
- Expertise in Test Framework & automation scripts development, CI/CD experience using Python, SHELL, Ansible, Git & Jenkins, docker containers & Kubernetes.
- Solid understanding of system-level debugging and analysis tools.
Nice to have
- Experience with GPU server architecture and storage validation in Datacenter infrastructure.
- Hands-on expertise with Kubernetes, Docker containers & Jenkins pipelines.
- Certifications in storage (e.g., SNIA) or HPC systems or Storage Performance experience with mdtest or FIO tool.
Skills: HW validation, Datacenter Systems, test strategies, automation tools, Python, system-level debugging
This role has been open 0 days — well below the 51-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
327
|
Median days open
51 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (327 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 19 | 327 |
| Open roles in the wider Silicon Validation & Test family | 102 | 2111 · 111 employers |
| Median days open | 19 d | 51 d (−32 d vs this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: HW validation, Datacenter Systems, test strategies, automation tools, Python, system-level debugging
Who's hiring in this category
- AMD · 50 open roles · median 48 d
- Micron Technology · 29 open roles · median 25 d
- Qualcomm · 25 open roles · median 83 d
- Graphcore · 19 open roles · median 98 d
- Microchip Technology · 18 open roles · median 51 d
- NVIDIA (this employer) · 17 open roles · median 19 d
How we counted: 327 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 23 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.