Skip to main content
NVIDIA

Senior GPU Architect - Performance and Yield Optimization - CA, Santa Clara, United States

NVIDIA US, CA, Santa Clara, United States 29 days ago
Digital Design & SoC Architecture

$184,000 - $356,500 USD yearly

Originally posted 15 September 2026 by the employer.

About the role

This role involves shaping GPU architectures to improve product yield while maintaining performance and architectural simplicity. The scope includes analyzing manufacturing defects, developing methods to isolate or disable affected regions, and preserving useful functionality.

What you'll do

- Analyze how manufacturing defects affect architectural resources. - Develop methods that isolate or disable affected regions while preserving useful functionality. - Build software tools and models that capture architectural, performance, and product requirements as rules and constraints. - Develop efficient optimization techniques that explore large configuration spaces and identify viable product configurations. - Develop approaches for multi-die architectures that improve utilization of available silicon while meeting product and performance requirements. - Evaluate yield, performance, area, implementation cost, complexity, and product flexibility.

What you'll need

- BS, MS, or PhD in Computer Engineering, Computer Science, Electrical Engineering, or a related field, or equivalent experience, plus 10+ years in GPU, CPU, SoC, or complex processor architecture. - Strong understanding of GPU architecture, the overall execution pipeline, and interactions across major GPU subsystems. - Strong computer architecture fundamentals and the ability to reason about disabling, isolating, or reconfiguring resources. - Strong C++ and/or Python skills with experience building architectural models, simulators, optimization frameworks, or engineering analysis tools. - Experience translating architecture and product requirements into rules, constraints, algorithms, and executable analysis, including complex optimization or configuration problems. - Ability to quantify performance, product yield, area, cost, and complexity tradeoffs and influence decisions across architecture, design, implementation, and product teams.

Skills: GPU architecture, optimization techniques, multi-die architectures, yield, performance

Market context

This role has been open 28 days — well below the 79-day median for SoC/Chip Architecture roles.

SoC/Chip Architecture · SOC Architecture

Open roles in category
453
Median days open
79 d
Median salary
$233k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NVIDIA compares in SoC/Chip Architecture hiring
Metric NVIDIA All employers we track in this specialty (453 roles · 63 employers)
Open roles in this specialty 56 453
Open roles in the wider Digital Design & Verification family 233 3167 · 115 employers
Median days open 68 d 79 d (−11 d vs this employer)
Median salary (USD postings) — $233k

Skills observed across this category: GPU architecture, optimization techniques, multi-die architectures, yield, performance

Who's hiring in this category

  • Qualcomm · 71 open roles · median 85 d
  • NVIDIA (this employer) · 57 open roles · median 68 d
  • AMD · 34 open roles · median 63 d
  • Apple · 34 open roles · median 8 d
  • Arm Holdings · 27 open roles · median 111 d
  • NXP Semiconductors · 21 open roles · median 113 d

How we counted: 453 open SoC/Chip Architecture (SOC Architecture) roles from 63 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
$184,000 - $356,500 USD yearly
29 days ago

Share this job