Senior FPGA Engineer - San Jose, CA, United States
$91,600 - $126,000 USD yearly
Originally posted 17 September 2026 by the employer.
About the role
This role involves architecting and implementing FPGA solutions for prototyping and link partner platforms, including the development and maintenance of FPGA builds. It focuses on integrating FPGA logic with embedded software and various host interfaces.
What you'll do
- Architect and implement FPGA solutions for prototyping platform and link partner platform.
- Develop and maintain FPGA build (simulation, synthesis, P&R, timing closure, bitstream generation, regression).
- Integrate FPGA logic with embedded software, drivers, and host interfaces (Ethernet, USB, UART, SPI, I2C, etc.).
- Bring up FPGA platforms, including board-level testing, power-on sequencing, clocking/reset strategy, and peripheral enablement.
- Perform system-level debug.
- Document platform architecture, integration guides, and best practices.
What you'll need
- Bachelor’s or master’s degree in electronic engineering, Computer Engineering, or related field (or equivalent experience).
- Strong FPGA development experience using Verilog/SystemVerilog and/or VHDL.
- Hands-on experience with tools (e.g., Xilinx Vivado/Synplify).
- Experience with verification and debug: simulation (e.g., VCS/ModelSim), test benches, assertions, and on-chip debug tools.
- Scripting/automation experience (Python, Tcl) to improve build flows and productivity.
Skills: FPGA solutions, prototyping platform, Verilog/SystemVerilog, Xilinx Vivado, timing closure
This role has been open 25 days — well below the 55-day median for FPGA Design roles.
FPGA Design · RTL Design
|
Open roles in category
104
|
Median days open
55 d
|
Median salary
$162k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Infineon Technologies | All employers we track in this specialty (104 roles · 27 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 104 |
| Median days open | 33 d | 55 d (−22 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Skills observed across this category: FPGA solutions, prototyping platform, Verilog/SystemVerilog, Xilinx Vivado, timing closure
Who's hiring in this category
- Altera · 29 open roles · median 56 d
- AMD · 11 open roles · median 50 d
- Teradyne · 10 open roles · median 65 d
- Qualcomm · 8 open roles · median 37 d
- Microchip Technology · 6 open roles · median 88 d
- Keysight Technologies · 5 open roles · median 5 d
How we counted: 104 open FPGA Design (RTL Design) roles from 27 employers tracked in the SemiconductorJobs index, counted 13 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.