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Altera

Senior FPGA Development Kit Technical Lead Engineer - San Jose, California, United States

Altera San Jose, California, United States Full-time 1 month ago
Digital Design & SoC Architecture

$166,900 - $241,000 USD yearly

Originally posted 1 September 2026 by the employer.

About the role

This role involves leading the end-to-end development and execution of complex FPGA development platforms and evaluation kits. You will drive development kit execution across board architecture, RTL, firmware, platform engineering, functional validation, manufacturing, and supply chain activities.

What you'll do

  • Lead end-to-end development of Altera FPGA Development Kits with board architecture, RTL, and firmware teams.
  • Lead development kit manufacturing execution with contract manufacturers, component suppliers, PCB fabricators, and PCB assembly partners.
  • Drive BOM planning and cost optimization, managing part availability, supply risk, component obsolescence, and engineering change orders.
  • Serve as the central point of contact across cross-functional teams including architecture, development kit functional validation, firmware, RTL-based manufacturing test development, manufacturing, and customer engineering.
  • Use lessons learned and stakeholder feedback to improve design methods, execution efficiency, and overall platform robustness.

What you'll need

  • Bachelor's or Master's degree in Electrical Engineering or a related field, with 10+ years of professional engineering experience in FPGA platforms, development or evaluation kits, board development, or test engineering.
  • 10+ years of hands-on experience working with digital and analog/RF circuits, FPGA-based boards, development or evaluation kits, or complex hardware platforms.
  • Demonstrated understanding of board-level functional and system-level test methodologies.
  • 10+ years of experience working with FPGA development, board-level hardware, RTL, firmware, or hardware test environments.
  • Working knowledge of the Altera Quartus tool flow.
  • 10+ years of experience communicating and collaborating effectively across global, cross-functional engineering organizations.
Market context

This role has been open 43 days — well below the 56-day median for FPGA Design roles.

FPGA Design · RTL Design

Open roles in category
104
Median days open
56 d
Median salary
$162k
See the full market breakdown ▾Category comparison, and who else is hiring
How Altera compares in FPGA Design hiring
Metric Altera All employers we track in this specialty (104 roles · 27 employers)
Open roles in this specialty 29 104
Median days open 57 d 56 d (+1 d vs this employer)
Median salary (USD postings) — $162k

Who's hiring in this category

  • Altera (this employer) · 29 open roles · median 57 d
  • AMD · 11 open roles · median 51 d
  • Teradyne · 10 open roles · median 66 d
  • Qualcomm · 8 open roles · median 38 d
  • Microchip Technology · 6 open roles · median 89 d
  • Keysight Technologies · 5 open roles · median 6 d

How we counted: 104 open FPGA Design (RTL Design) roles from 27 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Apply now
San Jose, California, United States
On-site
Full-time
$166,900 - $241,000 USD yearly
1 month ago

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