Senior Engineer II - CAD (Physical Verification) - AZ - Chandler, United States
Originally posted 2 September 2026 by the employer.
This role focuses on flow development and support for back end physical verification using Siemens Calibre and Cadence Pegasus.
About the role
This role involves global support for multiple technology nodes and tools used in product development, providing innovative solutions for the design community.
What you'll do
- Develop physical verification regression test cases to QA physical verification decks
- Support Layout and Design engineers with physical verification activities using tools such as Siemens Calibre, Cadence Pegasus, or Synopsys Hercules
- Utilize knowledge of advanced EDA methods to support ESD, ERC, Voltage-Aware DRC, via doubling methodologies
- Work with Technology Development and Device Engineering to develop DRC rules, additional devices, and design for manufacturability checks
- Develop rule decks as needed to support flow
- Verify and enhance foundry rule decks
- Support remote sites worldwide with layout verification activities
- Support debug of physical verification issues
What you'll need
- Bachelors in Electrical Engineering or related field with 7.5 to 10 years experience developing and supporting physical verification activities
- In-depth knowledge of Calibre DesignRev scripting
- Fluent with SVRF and TVF
- Accomplished at debugging PV issues with RVE, Vue or other EDA visualizer
- Familiar with customizing Calibre Interactive
- Skilled with Tcl/Tk, Perl, Python, and other programming languages, inside and outside of EDA tools
- Solid knowledge of layout rules and concepts, device identification concepts, and foundry rules
- Strong knowledge of Design for Manufacturing solutions affecting quality, reliability, and yield of designs
- Strong knowledge of Cadence Virtuoso and/or CalibreDRV
Nice to have
- Masters in Electrical Engineering or related field
- Knowledge of Extraction, Reliability and Dynamic Noise
- Extensive knowledge of Calibre/Pegasus/Hercules syntax and semantics, or similar layout verification tool
Skills: physical verification, Calibre, Pegasus, DRC, LVS, SVRF
This role has been open 42 days — well below the 82-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
687
|
Median days open
82 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Microchip Technology | All employers we track in this specialty (687 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 687 |
| Open roles in the wider Physical Implementation family | 28 | 1463 · 108 employers |
| Median days open | 41 d | 82 d (−41 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: physical verification, Calibre, Pegasus, DRC, LVS, SVRF
Who's hiring in this category
- Cadence Design Systems · 157 open roles · median 169 d
- Synopsys · 65 open roles · median 37 d
- Micron Technology · 42 open roles · median 94 d
- Qualcomm · 41 open roles · median 65 d
- NVIDIA · 40 open roles · median 78 d
- GlobalFoundries · 30 open roles · median 48 d
How we counted: 687 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.