Senior Engineer - HIG HBM PSE - Design Validation - Boise, ID - Main Site, United States
Originally posted 7 October 2026 by the employer.
Work on High Bandwidth Memory (HBM) products and silicon validation.
About the role
This role involves developing and validating High Bandwidth Memory (HBM) products from design through volume production. You will contribute to the verification and validation of complex HBM designs, including gate-level and RTL style logic design, which rely on stacking DRAM chips with a logic chip using TSV technology.
What you'll do
- Understand JEDEC specifications for HBM.
- Craft internal architecture documentation, schematic, and layout knowledge of builds.
- Perform silicon validation of HBM designs.
- Address problems through hardware and software debugging in the lab, circuit simulations, and data analysis.
- Contribute to continuous improvement of validation methodologies and workflows.
What you'll need
- Bachelor's degree or MS or equivalent experience in Electrical or Computer Engineering.
- Experience with Schematic, Simulation, Data Analysis, Lab Debug, or Pattern Manipulation.
- Productive and efficient time usage.
- Excellent problem-solving and analytical skills.
- Ability to work in a team environment.
Nice to have
- Coursework in VLSI, semiconductor process, Python and C/C++.
- Experience with Verilog, VHDL, or System Verilog.
Skills: HBM, silicon validation, JEDEC, schematic, lab debug
This role has been open 4 days — well below the 66-day median for Product Engineering roles.
Product Engineering · Memory Design
|
Open roles in category
96
|
Median days open
66 d
|
Median salary
$154k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (96 roles · 13 employers) |
|---|---|---|
| Open roles in this specialty | 62 | 96 |
| Open roles in the wider Silicon Validation & Test family | 212 | 2195 · 111 employers |
| Median days open | 76 d | 66 d (+10 d vs this employer) |
| Median salary (USD postings) | — | $154k |
Skills observed across this category: HBM, silicon validation, JEDEC, schematic, lab debug
Who's hiring in this category
- Micron Technology (this employer) · 62 open roles · median 75 d
- SanDisk · 14 open roles · median 51 d
- KIOXIA America · 5 open roles · median 19 d
- Cadence Design Systems · 3 open roles · median 200 d
- Solidigm · 3 open roles · median 31 d
- OmniVision · 2 open roles · median 152 d
How we counted: 96 open Product Engineering (Memory Design) roles from 13 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.