Senior Engineer - Analog Design - Canada - Ottawa - March Road, Canada

Originally posted 16 July 2026 by the employer — open 56 days.

About the role

This role involves the development of high-performance analog and mixed-signal IP used across Microchip timing products.

What you'll do

• Design and simulate analog IP blocks for mixed-signal SoC products
• Implement circuit requirements into production-ready designs
• Perform PVT corner analysis and block-level modeling
• Support silicon validation and lab characterization

What you'll need

• PhD or Master's degree in Electrical Engineering
• 3–5 years of professional experience in analog or mixed-signal IC design
• Experience with circuits such as PLLs/DLLs, ADCs/DACs, filters, or high-speed I/O
• Strong analog fundamentals and experience with Cadence IC design tools

Nice to have

• Research directly applicable to practical analog design
• Verilog-A modeling experience
• Scripting/automation (Skill, Python, Perl, Tcl)
• Silicon bring-up or lab validation exposure

Skills: PLL, high-speed digital circuits, MEMS drivers, high-speed I/Os, Cadence IC design flow