Senior Engineer - AMS IP Verification - Bengaluru, India

Originally posted 17 July 2026 by the employer — open 55 days.

About the role

This role involves providing verification support for pre-silicon IP designs within DRAM and emerging memory architectures.

What you'll do

• Simulate, analyze, and debug pre-silicon IP designs.
• Develop test cases and stimulus to increase functional coverage for DRAM and emerging memory architectures.
• Develop and maintain test benches and test vectors using simulation tools.
• Run regressions for coverage analysis and improvements.
• Co-work on developing new verification flows for DRAM and emerging memory design challenges.
• Participate in developing verification methodology and environments for advanced DRAM and emerging memory products.

What you'll need

• 2+ years of experience in AMS/Mixed Signal design verification.
• Bachelor's or Post Graduate Degree in Electronics Engineering or related engineering field.
• Understanding of analog / mixed signal circuits.
• Experience with Virtuoso, Hspice, Xcellium, Simvision, Waveview.
• Hands-on experience in writing Verilog Models.
• Hands-on experience in building SPICE testbenches at Block, Fullchip Level.
• Hands-on experience in SV, UVM based Verification.
• Hands-on experience in SV/PSL assertions.

Skills: AMS/Mixed Signal design verification, Virtuoso, Hspice, Xcellium, Simvision, Waveview, Verilog Models, SV, UVM based Verification, SV/PSL assertions