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Astera Labs

Senior Embedded Software Engineer - Ethernet Retimers - San Jose, California, United States

Astera Labs San Jose, California, United States 5 months ago
Embedded & Systems Software

$133,200 - $185,000 USD yearly

Originally posted 5 June 2026 by the employer.

About the role

Astera Labs is seeking a Senior Embedded Software Engineer to bridge system validation and firmware development for Ethernet retimers and gearboxes. The role focuses on debug, system integration, and firmware feature development for the Taurus product line across active electrical cables and in-system deployments.

What you'll do

- Debug firmware behavior across Ethernet configurations, link states, and failure modes in direct collaboration with the system validation team. - Investigate and resolve firmware issues in embedded C, analyzing interactions among Layer 1 PHY, SERDES, FEC/PCS, MAC, and retimer components. - Support customer bring-up and integration activities by diagnosing field issues in partnership with field applications engineers. - Develop firmware features for SERDES configuration, link training, equalization, and diagnostics across the Taurus product lifecycle. - Debug across the hardware/software boundary using register accesses, embedded SDKs, link state machines, and PHY telemetry.

What you'll need

- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. - 5+ years of experience in firmware development or embedded systems engineering. - Hands-on experience with Ethernet at the system or device level, including Layer 1 PHY, SERDES, retimers, gearboxes, NICs, or switches. - Embedded C/C++ programming skills with experience working in a firmware codebase on real hardware. - Experience debugging register accesses, embedded SDKs, link state machines, PHY telemetry, and debug print logs. - Familiarity with Linux development tools, including gcc/clang, make, bash, gdb, and git.

Nice to have

- Experience with switch or NIC management software, SAI, or OpenBMC. - Knowledge of PMA, FEC, or other PHY-layer subsystems beyond the SERDES. - Background with retimer or gearbox firmware or SDK/API development. - Python scripting for debug, test automation, or data analysis. - Experience with lab equipment including BERT, oscilloscopes, and test equipment from Viavi, LeCroy, EXFO, Keysight, or Tektronix. - Understanding of signal integrity concepts such as equalization, jitter, eye diagrams, and link margin.

Skills: firmware development, embedded C, Ethernet retimers, system integration, PHY-layer subsystems

Apply now
San Jose, California, United States
On-site
$133,200 - $185,000 USD yearly
5 months ago

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