Senior Director, SoC Power and Clocking Technology - San Jose, California, United States
$397,800 - $538,200 USD yearly
Originally posted 2 April 2026 by the employer. Relisted by the employer on 5 August 2026.
About the role
As Senior Director, SoC Power and Clocking Technology, you will lead a team delivering architecture and verified designs for power and clocking. You will oversee SoC-level clock, reset, power, and thermal management architectures from initial exploration through implementation and post-silicon bring-up.
What you'll do
- Direct a global multi-functional team delivering architecture and verified designs for SoC power and clocking. - Gather requirements, prototype, and develop SoC-level clock, reset, power, and thermal management architectures. - Resolve technical issues throughout the development lifecycle, from architectural exploration through implementation and post-silicon bring-up. - Work with partners, OEMs, and internal software teams to identify, prioritize, and resolve SoC and platform-level challenges.
What you'll need
- Bachelor's degree in science or engineering. - 20+ years of experience in SoC architecture and Hardware (HW) design. - 5+ years of experience specifically architecting, developing, and delivering clock, reset, power, and thermal solutions. - Technical background in DVFS, power gating, voltage regulation, digital clocking, reset, and electrical limits management solutions. - Experience with standards and specifications including ARM Power Control System Architecture (PCSA), System Control and Management Interface (SCMI), ACPI, and BSA. - Technical expertise in processor low power states as well as use-cases power and performance modeling or analysis.
Nice to have
- Master's degree in science or engineering. - Experience architecting or developing ARM or x86-based laptop products at SoC and system/platform level. - Experience in automotive, IoT, infrastructure, or mobile SoC and board-level power and power delivery. - Proven track record of timely, to-specification delivery of multiple projects in parallel.
Skills: clock, reset, power management, thermal management, DVFS, Power Gating
This role has been open 120 days — well above the 77-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
473
|
Median days open
77 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (473 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 27 | 473 |
| Open roles in the wider Digital Design & Verification family | 104 | 3298 · 115 employers |
| Median days open | 120 d | 77 d (+43 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: clock, reset, power management, thermal management, DVFS, Power Gating
Who's hiring in this category
- Qualcomm · 79 open roles · median 86 d
- NVIDIA · 53 open roles · median 72 d
- Apple · 37 open roles · median 15 d
- AMD · 35 open roles · median 72 d
- Arm Holdings (this employer) · 27 open roles · median 120 d
- Micron Technology · 21 open roles · median 99 d
How we counted: 473 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.