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Marvell Technology

Senior Director of Test Hardware Engineering

Marvell Technology 2 Locations 12 days ago
Verification, Validation & Test

Originally posted 22 September 2026 by the employer — open 0 days.

About the role

This role involves leading the worldwide test hardware engineering function, overseeing the development, delivery, and validation of all test hardware used in the testing of Marvell's silicon semiconductor chips. This position covers ATE load boards, probe cards, sockets, and change kits across NPI and production.

What you'll do

  • Establish and lead the Hardware engineering function as a unified global team.
  • Partner with PTE and Supply Chain to ensure hardware availability.
  • Lead test engineering strategy, equipment/vendor selection, and manage test hardware suppliers.
  • Drive loadboard design strategy including schematic, layout, SI/PI, and simulation capabilities.
  • Manage NPI and production hardware programs across probe cards, sockets, loadboards, and handler change kits.
  • Own CAPEX/OPEX budget forecasting, department headcount planning, and recruiting.
  • Drive cross-functional collaboration with Test Engineering, Product Engineering, Design Engineering and Supply Chain.

What you'll need

  • BS/MS/PhD in Electrical Engineering, Mechanical Engineering, or related field.
  • 8–10 years as a test/hardware engineer plus 6–8 years in a management role.
  • Proven track record leading teams through NPI and volume production in semiconductor industry.
  • Previous CAPEX/OPEX ownership and long-term roadmap definition experience.
  • Hands-on involvement in ATE hardware design processes (loadboards, probe cards, sockets).
  • Strong established relationships with test hardware suppliers (probe card, loadboard, socket vendors).
  • Understanding of manufacturability and build technology/process for PCB, MLO, and probe heads.
  • Thermal and mechanical engineering oversight – knowledge and ability to design solutions for complex package designs.
  • SI/PI knowledge for high-speed designs (Connectivity, Processor, ASIC, AI).
  • Hardware software tools and simulation process/technology direction.
  • Supply chain interlock and budget forecasting experience.
  • New technology qualification leadership.
Market context

This role has been open 0 days — well below the 25-day median for Silicon Test Engineering roles.

Silicon Test Engineering · DFT Test

Open roles in category
418
Median days open
25 d
Median salary
$184k
See the full market breakdown ▾Category comparison, and who else is hiring
How Marvell Technology compares in Silicon Test Engineering hiring
Metric Marvell Technology All employers we track in this specialty (418 roles · 68 employers)
Open roles in this specialty 12 418
Open roles in the wider Silicon Validation & Test family 37 2063 · 112 employers
Median days open 0 d 25 d (−25 d vs this employer)
Median salary (USD postings) — $184k

Who's hiring in this category

  • Teradyne · 51 open roles · median 4 d
  • Infineon Technologies · 37 open roles · median 31 d
  • Renesas Electronics · 33 open roles · median 32 d
  • Micron Technology · 27 open roles · median 22 d
  • Qualcomm · 24 open roles · median 20 d
  • AMD · 19 open roles · median 28 d

How we counted: 418 open Silicon Test Engineering (DFT Test) roles from 68 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
2 Locations
On-site
12 days ago

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