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onsemi

Senior Director, AI NPD Platforms & Engineering Intelligence - San Jose, CA, United States

onsemi San Jose, CA, United States 4 days ago
Physical Design & EDA

$216,775 - $390,195 USD yearly

Originally posted 29 September 2026 by the employer.

About the role

This role defines, builds, and governs AI-enabled New Product Development (NPD) at onsemi. The leader will establish the vision, strategy, operating model, and governance framework for Agentic AI across the semiconductor design lifecycle, enabling AI-assisted and AI-driven development.

What you'll do

  • Develop and execute the long-term strategy and roadmap for Agentic AI-enabled semiconductor product development.
  • Lead the creation of an enterprise Agentic AI framework supporting analog, digital, verification, layout, test engineering, applications engineering, documentation, requirements, and program management agents.
  • Establish company-wide governance for AI agents and engineering knowledge assets, including qualification, validation, release, version control, maintenance, retirement, and reuse.
  • Define and drive deployment of AI-enabled methodologies across circuit design, architecture exploration, RTL development, verification, physical design, device characterization, design reviews, failure analysis, and documentation generation.
  • Define AI governance policies for engineering workflows, establishing standards for model selection, training data usage, intellectual property protection, security, access controls, human-in-the-loop decision processes, validation requirements, auditability, and traceability.
  • Establish KPI frameworks measuring NPD cycle time, design productivity, engineering efficiency, agent reuse rates, AI adoption, design quality improvements, verification coverage improvements, and IP creation velocity.

What you'll need

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical discipline.
  • 15+ years of semiconductor industry experience.
  • 10+ years of leadership experience in product development, EDA, design methodology, CAD, semiconductor software, or AI-enabled engineering environments.
  • Deep understanding of semiconductor development workflows including Analog design, Digital design, Verification, Physical design, Design automation, and Semiconductor manufacturing flows.
  • Experience leading complex cross-functional engineering organizations.
  • Proven ability to influence executive leadership and drive organizational transformation.

Nice to have

  • Advanced degree (MS or PhD) in Electrical Engineering, AI, Machine Learning, Computer Science, or related field.
  • Experience developing AI-enabled EDA tools, semiconductor design automation platforms, or Agentic AI systems.
  • Hands-on experience with LLMs, Retrieval-Augmented Generation (RAG), Multi-Agent Architectures, Model Context Protocol (MCP), Workflow Orchestration Platforms, Reinforcement Learning, AI Copilots, and Knowledge Graphs.
  • Background in organizational AI transformation programs.

Skills: agentic AI design engineering, semiconductor development workflows, AI agents, design automation, AI-enabled EDA tools

Market context

This role has been open 1 day — well below the 42-day median for EDA/CAD Engineering roles.

EDA/CAD Engineering · AI EDA Design

Open roles in category
61
Median days open
42 d
Median salary
$193k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How onsemi compares in EDA/CAD Engineering hiring
Metric onsemi All employers we track in this specialty (61 roles · 23 employers)
Open roles in this specialty 1 61
Open roles in the wider Physical Implementation family 9 1427 · 109 employers
Median days open 1 d 42 d (−41 d vs this employer)
Median salary (USD postings) — $193k

Skills observed across this category: agentic AI design engineering, semiconductor development workflows, AI agents, design automation, AI-enabled EDA tools

Who's hiring in this category

  • NXP Semiconductors · 12 open roles · median 49 d
  • Cadence Design Systems · 7 open roles · median 22 d
  • NVIDIA · 7 open roles · median 21 d
  • Keysight Technologies · 6 open roles · median 1 d
  • Qualcomm · 4 open roles · median 58 d
  • Synopsys · 3 open roles · median 43 d

How we counted: 61 open EDA/CAD Engineering (AI EDA Design) roles from 23 employers tracked in the SemiconductorJobs index, counted 1 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.

Apply now
San Jose, CA, United States
On-site
$216,775 - $390,195 USD yearly
4 days ago

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