$109,700 - $175,500 USD yearly
Originally posted 8 September 2026 by the employer — open 1 day.
About the role
This role involves developing advanced semiconductor devices within the Mixed-Signal ASIC division for Data Center Enterprise Storage.
What you'll do
- Act as a technical liaison between US design teams and global cross-functional teams.
- Provide technical support through product development phases including testing, yield analysis, characterization, reliability analysis, qualification, and release to manufacturing.
- Adhere to schedule, die size, and power commitments.
- Conduct detailed design reviews with internal and external customers.
- Define system requirements, digital control functions, and block partitions for preamplifier products (if Design focused).
- Architect, develop, and maintain advanced UVM-based testbenches for functional verification of complex mixed-signal ASICs (if Verification focused).
What you'll need
- Bachelor's degree in Engineering and 8+ years of experience; or Master's degree in Engineering and 6+ years of experience.
- Excellent spoken and written communication skills.
- Proven ability to apply advanced math and physics to solve complex engineering problems.
- Strong hands-on experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, formal verification, and place & route (if Design focused).
- Deep familiarity with Verilog/VHDL RTL coding and logic design (if Design focused).
- Deep expertise in coverage-driven verification processes and frameworks (UVM/OVM) (if Verification focused).
- Strong understanding of event-driven simulator-based modeling techniques and how digital logic interacts with analog boundaries (if Verification focused).
- Hands-on experience with SystemVerilog Assertions (SVA) and behavioral modeling of analog circuits (if Verification focused).
- Proficiency in scripting (Python, Perl, TCL) to automate verification workflows, manage regressions, and streamline simulation infrastructure (if Verification focused).
Nice to have
- An understanding of silicon process technologies (CMOS and Bipolar) and device physics.
- Expertise across both design and verification domains.
Skills: Mixed-Signal ASIC, digital logic design, Verilog coding, UVM-based testbenches, functional verification, static timing analysis
This role has been open 1 day — well below the 79-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
173
|
Median days open
79 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (173 roles · 44 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 173 |
| Open roles in the wider Analog & Mixed-Signal family | 42 | 1317 · 100 employers |
| Median days open | 21 d | 79 d (−58 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: Mixed-Signal ASIC, digital logic design, Verilog coding, UVM-based testbenches, functional verification, static timing analysis
Who's hiring in this category
- Analog Devices · 25 open roles · median 117 d
- Infineon Technologies · 14 open roles · median 71 d
- NVIDIA · 12 open roles · median 51 d
- SiTime · 11 open roles · median 169 d
- Qualcomm · 10 open roles · median 55 d
- Microchip Technology · 8 open roles · median 168 d
How we counted: 173 open Mixed-Signal Design (Mixed Signal) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.