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Analog Devices

Senior Digital Design Engineer for MEMs ASIC - Milan, Assago, Italy

Analog Devices Italy, Milan, Assago, Italy 3 days ago
Digital Design & SoC Architecture

€40,810 - €59,095 EUR yearly

Originally posted 6 October 2026 by the employer.

About the role

This role involves leading block-level designs and verification efforts for complex digital systems, with a focus on timing closure and power optimization.

What you'll do

  • Lead block-level digital designs and verification activities.
  • Develop and implement complex digital systems with a focus on performance optimization.
  • Ensure timing closure and power optimization for critical design blocks.
  • Mentor junior engineers and provide technical guidance.
  • Interface with customers to understand requirements and present technical solutions.
  • Drive cross-functional collaboration to ensure cohesive system design.

What you'll need

  • Advanced expertise in complex digital circuit design and implementation.
  • Strong capability in achieving timing closure on complex designs.
  • Practical experience optimizing digital designs for power efficiency.
  • Ability to integrate digital blocks with analog/mixed-signal environments.
  • Competence in block-level architecture design and implementation.
  • Thorough understanding of digital verification approaches and tools.

Nice to have

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.
  • 5-8 years of relevant experience in digital design engineering.
Market context

This role has been open 3 days — well below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1010
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Analog Devices compares in Digital/RTL Design hiring
Metric Analog Devices All employers we track in this specialty (1010 roles · 97 employers)
Open roles in this specialty 49 1010
Open roles in the wider Digital Design & Verification family 100 3195 · 113 employers
Median days open 41 d 62 d (−21 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 143 open roles · median 60 d
  • Synopsys · 82 open roles · median 24 d
  • AMD · 73 open roles · median 35 d
  • Analog Devices (this employer) · 48 open roles · median 40 d
  • NXP Semiconductors · 48 open roles · median 77 d
  • NVIDIA · 45 open roles · median 63 d

How we counted: 1010 open Digital/RTL Design (RTL Design) roles from 97 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Italy, Milan, Assago, Italy
On-site
€40,810 - €59,095 EUR yearly
3 days ago

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