Senior Design Verification Engineer - Neuromorphic Computing - United States
$122,440 - $232,190 USD yearly
Originally posted 1 September 2026 by the employer.
Develop and scale verification methodologies for Intel's Loihi series of neuromorphic computing research chips.
About the role
This role involves pre-silicon verification for novel neuromorphic computing architectures, spanning software, RTL, and emulation platforms. You will contribute to the development of Intel's Loihi series of research chips.
What you'll do
- Map application-level requirements to unit- and system-level test plans.
- Write Python-based directed and random tests for design partitions and chip-level.
- Run regressions, debug test failures, track coverage and work with designers to fix failures and improve coverage.
- Maintain assertions, scoreboards and any tools/flows that are developed.
- Integrate VIPs and coordinate with IP teams to ensure protocol requirements are met.
What you'll need
- Bachelors and 5+ years OR Masters and 3+ years of silicon engineering experience.
- 3+ years of pre-silicon verification or post-silicon validation experience in SoC accelerators or custom ASIC designs.
- 3+ years of experience in UVM and constrained random verification methods.
- 2+ years of experience developing the entire verification stack from test planning to execution, covering test development, coverage tracking, emulation, and post-silicon.
- 1+ year of experience using AI tools for test generation, debugging and improving overall productivity.
Nice to have
- Experience with neuromorphic computing or AI/ML accelerator design.
- Experience with commercial Verification IPs for standard IO interfaces, PHYs, and protocols such as Ethernet, PCIE, MACsec/IPsec, RoCEv2, MIPI CSI-2, JESD204.
- Experience with DFX, low power and UPF verification techniques.
Skills: pre-silicon verification, UVM, constrained random verification, test planning, neuromorphic computing, AI/ML accelerator
This role has been open 46 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1202
|
Median days open
65 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (1202 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 32 | 1202 |
| Open roles in the wider Digital Design & Verification family | 87 | 3202 · 115 employers |
| Median days open | 37 d | 65 d (−28 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: pre-silicon verification, UVM, constrained random verification, test planning, neuromorphic computing, AI/ML accelerator
Who's hiring in this category
- Qualcomm · 110 open roles · median 39 d
- AMD · 96 open roles · median 51 d
- NVIDIA · 84 open roles · median 59 d
- Synopsys · 64 open roles · median 33 d
- SiFive · 55 open roles · median 75 d
- Cadence Design Systems · 50 open roles · median 117 d
How we counted: 1202 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.