Senior Design Verification Engineer – CPU Core Verification (Vector) - United States
Originally posted 13 September 2026 by the employer — open 4 days.
About the role
This role involves driving verification of high-performance CPU core functionality, with a focus on RISC-V Vector Extension (RVV) and vector microarchitecture verification. The scope includes core areas such as Frontend, Midcore, Load-Store Unit, Hardware Prefetch, and Vector Unit / vector microarchitectural interactions.
What you'll do
- Own verification planning and execution for assigned high-performance CPU core areas, from block-level verification through core-level integration.
- Create effective verification strategies and test plans based on CPU architecture and microarchitectural behavior.
- Develop and maintain robust verification environments, checkers, scoreboards, assertions, stimulus, and coverage models.
- Define and execute directed and constrained-random tests for branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, hardware prefetch behavior, and vector execution correctness.
- Drive verification of RVV and vector-unit functionality, including vector arithmetic, vector memory operations, masking behavior, configuration-dependent execution, hazard handling, exception behavior, and scalar-vector interactions.
- Write functional coverage, analyze code and functional coverage, and close coverage gaps to ensure verification completeness and signoff quality.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 5+ years of relevant experience in IP, CPU/core, or SoC functional verification, with direct experience in CPU/core verification.
- Strong hands-on experience with SystemVerilog-based verification and modern verification methodologies.
- Solid understanding of computer architecture and CPU microarchitecture fundamentals.
- Experience with test planning, verification environment development, stimulus generation, failure analysis, coverage analysis, and coverage closure.
- Strong debug skills and the ability to translate architectural intent into effective verification strategy and execution.
- Strong programming and scripting fundamentals for building scalable verification solutions.
- Experience in one or more CPU core areas such as Frontend, Midcore, Load-Store Unit, memory ordering and consistency, Hardware Prefetch, or Vector Unit verification.
Nice to have
- Direct experience with high-performance out-of-order CPU core verification.
- Experience with RISC-V Vector Extension (RVV), SIMD, or vector-processor verification.
- Experience verifying vector behaviors such as vector arithmetic, masking, reductions, permutations, vector-scalar operations, and vector load/store functionality.
- Experience verifying complex CPU microarchitectural behaviors involving concurrency, replay, flush, redirects, dependency handling, or weak memory ordering.
- Experience developing high-value assertions, checkers, and scoreboards for control-heavy or ordering-sensitive CPU behavior.
- Familiarity with formal verification, emulation, or acceleration.
Skills: CPU core verification, RISC-V Vector Extension, SystemVerilog, coverage analysis, microarchitectural interactions
This role has been open 4 days — well below the 56-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1122
|
Median days open
56 d
|
Median salary
$192k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SiFive | All employers we track in this specialty (1122 roles · 92 employers) |
|---|---|---|
| Open roles in this specialty | 51 | 1122 |
| Open roles in the wider Digital Design & Verification family | 82 | 3007 · 114 employers |
| Median days open | 44 d | 56 d (−12 d vs this employer) |
| Median salary (USD postings) | — | $192k |
Skills observed across this category: CPU core verification, RISC-V Vector Extension, SystemVerilog, coverage analysis, microarchitectural interactions
Who's hiring in this category
- Qualcomm · 104 open roles · median 53 d
- AMD · 99 open roles · median 33 d
- NVIDIA · 90 open roles · median 65 d
- Micron Technology · 56 open roles · median 96 d
- Synopsys · 54 open roles · median 23 d
- SiFive (this employer) · 51 open roles · median 44 d
How we counted: 1122 open Design Verification (Design Verification) roles from 92 employers tracked in the SemiconductorJobs index, counted 17 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.