Senior DDR Analog Characterization Engineer - Chandler, Arizona, United States
$198,100 - $268,000 USD yearly
Originally posted 14 August 2026 by the employer.
About the role
What you'll do
- Validate and characterize DDR memory (such as DDR5 or LPDDR6) by working with electrical margining and signal integrity.
- Conduct timing analysis to guarantee seamless functionality under various operating conditions.
- Develop and implement test plans and methodologies.
- Analyze test data to identify and resolve issues.
- Successfully implement automation tools to improve testing efficiency.
- Provide detailed documentation and reports on characterization results and findings.
What you'll need
- Strong foundation in electronics engineering with hands-on experience in DDR or LPDDR memory interface validation and characterization.
- Skilled in electrical margin and signal integrity measurements, encompassing eye diagrams, timing analysis, voltage margins, and DQ/DQS characterization.
- Experience using laboratory equipment such as high-bandwidth oscilloscopes, active probes, logic analyzers, signal generators, and power measurement instrumentation.
- Strong understanding of DDR protocols, memory training, timing relationships, and JEDEC specifications.
- Strong knowledge of silicon processes concentrating on high-speed memory interfaces.
Nice to have
- Experience developing automation using Python or similar scripting languages.
Skills: DDR memory, LPDDR6, electrical margining, signal integrity, oscilloscopes, JEDEC
This role has been open 63 days — well above the 42-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
409
|
Median days open
42 d
|
Median salary
$167k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arm Holdings | All employers we track in this specialty (409 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 409 |
| Open roles in the wider Silicon Validation & Test family | 16 | 2218 · 113 employers |
| Median days open | 86 d | 42 d (+44 d vs this employer) |
| Median salary (USD postings) | — | $167k |
Skills observed across this category: DDR memory, LPDDR6, electrical margining, signal integrity, oscilloscopes, JEDEC
Who's hiring in this category
- AMD · 58 open roles · median 43 d
- Micron Technology · 39 open roles · median 39 d
- Qualcomm · 36 open roles · median 28 d
- NVIDIA · 26 open roles · median 23 d
- Microchip Technology · 22 open roles · median 68 d
- Graphcore · 20 open roles · median 121 d
How we counted: 409 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.