Senior Custom ASIC Engineering Lead - USA-CA San Jose Innovation Drive, United States

Originally posted 30 July 2026 by the employer.

Broadcom develops critical Infrastructure chips that enable Customers to produce ASICs in almost all major segments of the Semiconductor industry, including AI.

About the role

This role involves leading external and internal cross-functional teams in areas such as physical design, STA, DFT, and packaging.

What you'll do

• Manage external customer ASIC programs from RFQs to production, including technology and IP collaterals, design, test, packaging, fabrication, and bring-up.
• Advise customers on best practices in EDA, flows, and design methodologies.
• Proactively assess potential risks to design quality and project schedule, and execute risk mitigation actions.
• Execute physical design flows to check that incoming customer tape-in netlists meet stringent tape-out quality standards.
• Stay abreast of developments in Broadcom IPs, technology, and end-user applications.
• Participate in discussions with marketing, sales, legal, and regulatory compliance teams regarding chips.

What you'll need

• Multiple tape-outs in advanced technology nodes.
• Ability to analyze PPA tradeoffs amongst various library components and architectures.
• Knowledge in low power design and power management.
• Hands-on experience in physical design, STA, EDA tools, design flows for physical design, logic simulation, test, and packaging.
• Programming in TCL, shell, and scripting languages.

Nice to have

• Exposure to SERDES communications protocols.
• Logic design, chip architecture, microarchitecture, Verilog RTL coding.
• Front-end logic design verification, DRC, logic synthesis.
• Knowledge of DFT methods including scan, memory BIST, and repair.

Skills: ASIC programs, physical design, STA, DFT, packaging, tape-out