Originally posted 24 September 2026 by the employer.
About the role
This role involves owning formal strategies for advanced out-of-order (OoO) CPU cores. You will work closely with micro-architects and RTL designers to verify complex execution pipelines.
Skills: Formal Verification, CPU cores, Formal Test-plan, Formal Abstraction Techniques, VC Formal, JasperGold, assertion libraries
More semiconductor jobs: SiFive jobs · Verification engineer jobs · India jobs
This role has been open 42 days — well below the 57-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1317
|
Median days open
57 d
|
Category median salary (all employers)
$184k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SiFive | All employers we track in this specialty (1317 roles · 99 employers) |
|---|---|---|
| Open roles in this specialty | 58 | 1317 |
| Open roles in the wider Digital Design & Verification family | 87 | 3497 · 120 employers |
| Median days open | 63 d | 57 d (+6 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Skills observed across this category: Formal Verification, CPU cores, Formal Test-plan, Formal Abstraction Techniques, VC Formal, JasperGold
Who's hiring in this category
- Qualcomm · 117 open roles · median 49 d
- NVIDIA · 104 open roles · median 71 d
- Apple · 99 open roles · median 9 d
- AMD · 83 open roles · median 65 d
- Synopsys · 73 open roles · median 50 d
- SiFive (this employer) · 58 open roles · median 63 d
How we counted: 1317 open Design Verification (Design Verification) roles from 99 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.