Senior CPU Architecture and Benchmarking Engineer - Oregon, Hillsboro, United States
$190,610 - $269,100 USD yearly
Originally posted 2 October 2026 by the employer.
About the role
This role involves driving low-level investigations into CPU designs, crafting targeted microbenchmarks, and translating findings into architectural guidance. Your work will bridge the gap between silicon measurement, software behavior, and architectural definition to shape Intel's future CPU roadmap.
What you'll do
- Design, implement, and analyze microbenchmarks to explore microarchitectural behavior (e.g., branch prediction, instruction fetch/decode, execution units, memory subsystem, prefetchers, power delivery).
- Investigate and document microarchitectural details of CPU designs through systematic benchmarking and analysis.
- Evaluate the impact of system software layers (OS schedulers, runtime libraries, compilers, firmware) on end-product CPU performance and power efficiency.
- Identify power/performance gaps and propose concrete architectural solutions and mitigations.
- Explore and evaluate proposed microarchitectural ideas in CPU performance simulators, providing quantitative measure of value.
- Develop and maintain tooling, test infrastructure, and analysis frameworks for repeatable and scalable benchmarking workflows.
What you'll need
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline with 8+ years of relevant industry experience, OR a Master's Degree in a related discipline with 6+ years of relevant industry experience.
- Deep understanding of out-of-order CPU microarchitecture, including pipeline stages, execution resources, memory hierarchy, and power/performance interactions.
- Demonstrated experience designing and interpreting low-level microbenchmarks for CPU characterization.
- Proficiency in assembly programming and low-level performance tooling (e.g., EMON/PMU counters, VTune, or equivalent).
- Strong background in performance analysis methodologies, bottleneck identification, and quantitative trade-off evaluation.
- Proficiency in C/C++ and scripting languages (Python or similar) for benchmark development and data analysis.
Nice to have
- Familiarity with cycle-accurate CPU performance simulators and the ability to model and evaluate new microarchitectural features.
- Understanding of software stack impacts on CPU performance, including OS scheduler behavior, memory allocators, compiler code generation, and BIOS/firmware tuning.
- Experience reading or debugging RTL to investigate microarchitectural behavior or validate benchmark hypotheses.
- Track record of translating benchmarking insights into concrete architectural recommendations or published technical contributions.
Skills: CPU microarchitecture, microbenchmarks, performance analysis, power/performance gaps, CPU performance simulators
This role has been open 0 days — well below the 73-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
442
|
Median days open
73 d
|
Median salary
$237k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (442 roles · 64 employers) |
|---|---|---|
| Open roles in this specialty | 12 | 442 |
| Open roles in the wider Digital Design & Verification family | 66 | 3110 · 114 employers |
| Median days open | 55 d | 73 d (−18 d vs this employer) |
| Median salary (USD postings) | — | $237k |
Skills observed across this category: CPU microarchitecture, microbenchmarks, performance analysis, power/performance gaps, CPU performance simulators
Who's hiring in this category
- Qualcomm · 71 open roles · median 80 d
- NVIDIA · 57 open roles · median 57 d
- AMD · 36 open roles · median 59 d
- Arm Holdings · 27 open roles · median 100 d
- Renesas Electronics · 22 open roles · median 57 d
- NXP Semiconductors · 20 open roles · median 102 d
How we counted: 442 open SoC/Chip Architecture (SOC Architecture) roles from 64 employers tracked in the SemiconductorJobs index, counted 3 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.