Senior Calibration Engineer (Compute Test, Agoura Hills, CA)
$167,200 - $267,600 USD yearly
Originally posted 16 October 2026 by the employer.
About the role
As a Senior Calibration Engineer, you will serve as a hands-on technical lead for calibration of instruments within the Compute Test division. This role involves owning calibration architecture and development for instrument areas, and leading a small team of 3–4 calibration engineers.
What you'll do
- Own calibration architecture and strategy for assigned Digital, DC, AC and/or RF instruments in ATE equipment.
- Develop and review calibration programs and embedded algorithms in C/C++/C# and Python.
- Author and approve calibration strategy documents that define HW circuits needed for instruments to meet accuracy specifications.
- Lead development of HW error budgets, and offline and online validation of error terms using statistical analysis.
- Define offline and online tests that validate instrument calibration and HW performance, including simulation with Verilog and SPICE.
- Lead root-cause analysis of calibration and HW performance issues, and drive corrective action with cross-functional teams.
- Integrate external measurement equipment (DMMs, spectrum analyzers, power meters) into calibration and validation programs.
- Lead 3–4 calibration engineers: set technical direction, assign and prioritize work, and review designs, code and documentation.
- Mentor and coach engineers toward independent ownership of calibration areas.
What you'll need
- 8+ years of experience developing calibration, measurement, test or instrumentation systems, including hardware/software integration.
- Strong programming skills in C, C++, C# and/or Python for instrument control, data acquisition and algorithm development.
- Hands-on experience with precision measurement, calibration methods, error analysis and statistical data analysis.
- Experience with bench instrumentation (DMM, oscilloscope, spectrum analyzer, power meter) and with automating measurements.
- Demonstrated technical leadership: leading projects, mentoring engineers, or directing the work of others.
- BS, MS or PhD in Electrical Engineering, Computer Engineering, Physics or a related field, or equivalent experience.
Nice to have
- Master’s degree in computer science and electrical engineering.
- Experience with ATE or semiconductor test equipment.
- Experience creating calibration strategy documents and HW error budgets.
- Prior experience supervising engineers or serving as a team lead.
This role has been open 0 days — well below the 29-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
543
|
Median days open
29 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Teradyne | All employers we track in this specialty (543 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 76 | 543 |
| Open roles in the wider Silicon Validation & Test family | 94 | 2226 · 113 employers |
| Median days open | 23 d | 29 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Who's hiring in this category
- Teradyne (this employer) · 71 open roles · median 23 d
- Renesas Electronics · 44 open roles · median 23 d
- Infineon Technologies · 41 open roles · median 38 d
- Qualcomm · 28 open roles · median 28 d
- Micron Technology · 27 open roles · median 36 d
- Texas Instruments · 24 open roles · median 23 d
How we counted: 543 open Silicon Test Engineering (DFT Test) roles from 76 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.