Senior ASIC Design Engineer - Memory Subsystem - CA, Santa Clara, United States
$136,000 - $264,500 USD yearly
Originally posted 13 October 2026 by the employer.
About the role
This role is for a Senior ASIC Design Engineer to join the Memory Subsystem Team, focusing on micro-architecture and design for NVIDIA's SOC Interconnects, ordering controllers, and memory accelerators.
What you'll do
- Collaborate with architecture, design verification, formal verification, and physical design teams.
- Be responsible for micro-architecture and design.
- Perform RTL design.
- Conduct synthesis.
- Perform timing analysis.
What you'll need
- BS or MS in Electrical Engineering or Computer Engineering or related degree (or equivalent experience).
- 5+ years of experience.
- Strong proficiency of Verilog or VHDL.
- Experience with PERL scripting language.
Nice to have
- Experience with high-speed coherent interconnects, protocol bridges, hardware-managed coherency and system level caches.
- Experience with multiple clock domains and asynchronous interfaces.
- Knowledge of industry specifications like CHI/CXL/PCI-E.
Skills: memory subsystem, micro-architecture, RTL design, synthesis, timing analysis, Verilog
This role has been open 0 days — well below the 68-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
300
|
Median days open
68 d
|
Median salary
$203k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (300 roles · 28 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 300 |
| Median days open | 56 d | 68 d (−12 d vs this employer) |
| Median salary (USD postings) | — | $203k |
Skills observed across this category: memory subsystem, micro-architecture, RTL design, synthesis, timing analysis, Verilog
Who's hiring in this category
- Micron Technology · 153 open roles · median 89 d
- Synopsys · 32 open roles · median 54 d
- Qualcomm · 18 open roles · median 97 d
- Broadcom · 17 open roles · median 55 d
- SanDisk · 17 open roles · median 41 d
- Apple · 6 open roles · median 134 d
How we counted: 300 open Memory Design (Memory Design) roles from 28 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.