Senior Application Engineer - US-CA-Calabasas, United States
$156,740 - $261,230 USD yearly
Originally posted 2 September 2026 by the employer.
Develop application strategies and user experience for a semiconductor design platform focusing on 3D Heterogeneous Integration, RF, and mmWave technologies.
About the role
This role involves shaping the user experience and application strategy for an advanced semiconductor design platform, specifically focusing on RF design environments and 3D Heterogeneous Integration.
What you'll do
- Engage with user engineering teams to understand workflows and identify bottlenecks in 3D Heterogeneous Integration (3DHI) and RF packaging.
- Serve as a domain authority on RF, mmWave, and advanced packaging workflows to guide platform APIs and features.
- Write Python scripts, API integration tests, and programmatic workflow examples for automated layout and schematic operations.
- Define evaluation flows and test cases for emerging 3DHI domains.
- Build and maintain end-to-end reference design flows and benchmarks to stress-test platform capabilities.
- Collaborate with internal software architects and developers to advocate for user priorities and validate new platform releases.
What you'll need
- Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or related technical field.
- Direct experience running, debugging, and resolving standard physical verification flows (Design Rule Checking (DRC) and Layout Versus Schematic (LVS)).
- Familiarity with electronic design and packaging abstractions, such as schematic connectivity, physical layout hierarchies, netlisting, or multi-die 2.5D/3D packaging concepts.
- Practical experience automating layout tasks, verification runs, or design setups using Python libraries or native EDA scripting interfaces (e.g., Python DSLs, PyAEDT, SKILL, or TCL).
- Strong interpersonal and communication skills for gathering workflow requirements and converting user feedback into technical guidance.
Nice to have
- Prior experience in an Application Engineering, Technical Marketing, or Solutions Architecture role within the EDA or semiconductor IP industry.
- Strong understanding of high-frequency RF/microwave circuit concepts, 2.5D/3D packaging structures (micro-bumps, TSVs, interposers), electromagnetic coupling, or signal integrity.
- Experience configuring or running multi-technology assembly verification, interposer DRC/LVS, die-to-die connectivity extraction, or 3D-IC verification flows.
- Experience with C++/Rust.
- Conceptual understanding of AI agentic frameworks, automated optimization algorithms, or LLM-driven developer tooling in engineering contexts.
Skills: RF design environments, 3D Heterogeneous Integration, RF mmWave, platform architecture, Python scripting
This role has been open 42 days — well below the 78-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
688
|
Median days open
78 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Keysight Technologies | All employers we track in this specialty (688 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 30 | 688 |
| Open roles in the wider Physical Implementation family | 39 | 1466 · 108 employers |
| Median days open | 69 d | 78 d (−9 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: RF design environments, 3D Heterogeneous Integration, RF mmWave, platform architecture, Python scripting
Who's hiring in this category
- Cadence Design Systems · 153 open roles · median 168 d
- Synopsys · 65 open roles · median 38 d
- Micron Technology · 44 open roles · median 80 d
- Qualcomm · 41 open roles · median 66 d
- NVIDIA · 39 open roles · median 79 d
- GlobalFoundries · 33 open roles · median 35 d
How we counted: 688 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.