Principal Analog Mixed Signal Verification Engineer - Chandler (Office), United States
Originally posted 12 August 2026 by the employer.
About the role
This role involves leading analog and mixed-signal verification for automotive and industrial PMIC products from specification through verification signoff. The work focuses on complex mixed-signal IPs, subsystems, and SoCs.
What you'll do
- Lead AMS verification activities, including plans, methodologies, environments, regressions, and schedules.
- Develop and validate mixed-signal simulation environments, behavioral models, and reusable verification components.
- Drive verification execution through test planning, constrained-random verification, and coverage analysis.
- Bridge digital and mixed-signal verification flows for block, subsystem, and top-level verification.
- Verify digital control, monitoring, and fault-management functions within PMIC and power-conversion products.
- Drive methodology improvements to increase simulation efficiency, reuse, and quality across projects.
What you'll need
- M.S. in Electrical Engineering, Computer Engineering, or a related field.
- Minimum 10 years of experience in analog and mixed-signal IC verification and development, including technical leadership.
- Strong understanding of analog and mixed-signal circuit fundamentals, including PMICs, DC-DC converters, LDOs, ADCs, DACs, PLLs, voltage references, and bandgaps.
- Expertise in AMS verification using Verilog-AMS, SystemVerilog, UVM, assertions, mixed-signal simulation, and Real Number Modeling (RNM).
- Experience developing behavioral models and reusable verification environments for complex mixed-signal designs.
- Strong knowledge of coverage-driven verification, constrained-random verification, regression automation, and verification signoff processes.
- Proficiency with industry-standard EDA tools from Cadence, Synopsys, and Siemens EDA.
- Experience with scripting languages such as Python, Perl, Tcl, or Shell.
Skills: AMS verification, Verilog-AMS, SystemVerilog, UVM, PMICs, DC-DC converters
This role has been open 48 days — well below the 92-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
153
|
Median days open
92 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (153 roles · 42 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 153 |
| Open roles in the wider Analog & Mixed-Signal family | 46 | 1385 · 107 employers |
| Median days open | 32 d | 92 d (−60 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: AMS verification, Verilog-AMS, SystemVerilog, UVM, PMICs, DC-DC converters
Who's hiring in this category
- Analog Devices · 24 open roles · median 77 d
- Infineon Technologies · 14 open roles · median 80 d
- NVIDIA · 11 open roles · median 53 d
- SiTime · 11 open roles · median 189 d
- Qualcomm · 8 open roles · median 57 d
- Broadcom · 7 open roles · median 41 d
How we counted: 153 open Mixed-Signal Design (Mixed Signal) roles from 42 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.