RTL2GDS Lead AE - San Jose, United States
$106,400 - $197,600 USD yearly
Originally posted 21 October 2026 by the employer.
About the role
As a Digital Implementation and Signoff Field Applications Engineer, you will provide technical support to customers deploying Cadence technologies in Synthesis, P&R, and Signoff to achieve PPA targets and design closure. You will also collaborate directly with Cadence R&D to convey customer requirements and influence tool capabilities.
What you'll do
- Provide technical support to customers in backend digital design implementation and signoff, including Place and Route, design closure, and timing/power signoff. - Guide customers on utilizing Cadence technologies to achieve design goals and project schedules. - Conduct technical presentations, product demonstrations, and drive customer technical evaluations and benchmarks. - Collaborate with R&D to enhance tools and methodologies based on customer requirements. - Amend and augment implementation flows using Tcl and other programming languages to improve results. - Capture best practices and lessons learned from evaluations and benchmarks to improve success rates across engagements.
What you'll need
- 5 years of industry Physical Design experience. - Strong knowledge in digital design fundamentals, semiconductor fundamentals, and Static Timing Analysis. - Prior experience with IC digital implementation flows and backend EDA tools, including Place and Route, IR drop, and backend timing and power closure. - Experience with advanced nodes 10nm and below. - Scripting proficiency in languages such as Tcl, Perl, or Python. - BS degree in Computer Science/Engineering, Electrical Engineering, or a related field.
Nice to have
- MS degree in Computer Science/Engineering, Electrical Engineering, or a related field. - Prior experience with IC digital implementation flows and front-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking. - Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus, or equivalent tools (ICC, ICC2, DC, or PrimeTime). - Experience with advanced nodes 5nm and below.
Skills: Field Applications, Place and Route, Synthesis, Static Timing Analysis, Tcl
This role has been open 0 days — well below the 33-day median for Applications FAE roles.
Applications FAE · EDA Tools
|
Open roles in category
111
|
Median days open
33 d
|
Median salary
$162k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (111 roles · 11 employers) |
|---|---|---|
| Open roles in this specialty | 31 | 111 |
| Median days open | 27 d | 33 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Skills observed across this category: Field Applications, Place and Route, Synthesis, Static Timing Analysis, Tcl
Who's hiring in this category
- Synopsys · 60 open roles · median 30 d
- Cadence Design Systems (this employer) · 25 open roles · median 35 d
- Keysight Technologies · 9 open roles · median 55 d
- Renesas Electronics · 9 open roles · median 68 d
- Arteris · 2 open roles · median 120 d
- Amazon · 1 open role · median 21 d
How we counted: 111 open Applications FAE (EDA Tools) roles from 11 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.