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AMD

RTL Design & Integration Engineer - CA, San Jose, United States

AMD US, CA, San Jose, United States Full-time 2 months ago
Digital Design & SoC Architecture

Originally posted 21 August 2026 by the employer.

This role focuses on technical execution within AMD’s FPGA Product development team.

About the role

As a key member of AMD's FPGA Product development team, you will have various responsibilities in the technical execution of Adaptive & Embedded Computing Group (AECG) device programs from conception and planning to productization. This role leverages modern RTL design methodologies, advanced EDA tools, and AI-driven automation.

What you'll do

  • Collaborate with architects, hardware engineers, and SW-FW engineers to understand product requirements and IP features.
  • Build early-stage RTL designs based on product and architecture intent driving Silicon and Solution co-development.
  • Support functional simulation and software quality checks, ensuring robust verification coverage.
  • Partner with global teams to achieve seamless integration and delivery.

What you'll need

  • Background expertise in RTL design (Verilog/SystemVerilog), including digital/analog block implementation.
  • Understanding of VLSI design flow, from RTL through Physical Design and GDSII.
  • Familiarity with Physical Implementation processes: floorplanning, synthesis, P&R, STA.
  • Experience with EDA tools (Synopsys Design Compiler, Primetime, VCS; Cadence Virtuoso).
  • Knowledge of UVM/OVM verification, simulation environments, and debugging.
  • Proficiency in scripting (Perl, Tcl, Python, Shell) for design automation.
  • Bachelor’s or Master’s in Computer Engineering or Electrical Engineering.

Nice to have

  • Understanding of FPGA architecture and usage models.
Market context

This role has been open 54 days — below the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1021
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How AMD compares in Digital/RTL Design hiring
Metric AMD All employers we track in this specialty (1021 roles · 103 employers)
Open roles in this specialty 71 1021
Open roles in the wider Digital Design & Verification family 255 3183 · 115 employers
Median days open 35 d 62 d (−27 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm · 140 open roles · median 62 d
  • Synopsys · 85 open roles · median 30 d
  • AMD (this employer) · 71 open roles · median 36 d
  • Analog Devices · 48 open roles · median 50 d
  • NVIDIA · 46 open roles · median 64 d
  • NXP Semiconductors · 41 open roles · median 85 d

How we counted: 1021 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
US, CA, San Jose, United States
On-site
Full-time
2 months ago

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