RISCV CPU System RTL Engineer - Santa Clara, California, United States of America
$142,200 - $213,400 USD yearly
Originally posted 14 May 2026 by the employer.
About the role
You will work on RISCV CPU RTL development targeting high-performance, low-power devices, contributing to architecture definition, microarchitecture, and RTL execution of CPU system features. Focus areas include configuration access protocols, timer and interrupt architecture, power management, and debug and trace architecture.
What you'll do
- Explore performance and power optimization opportunities in collaboration with the CPU modeling team. - Develop high-level architecture and microarchitecture specifications that translate into RTL design. - Own RTL development by assessing and refining RTL to meet power, performance, area, and timing goals. - Support functional verification by assisting the design verification team in executing verification strategies. - Collaborate with cross-functional engineering teams to validate physical design aspects including timing, area, reliability, testability, and power. - Work closely with software, firmware, and platform teams to enable CPU system features in products.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of relevant experience, or a Master's degree with 1+ year of experience, or a PhD. - Experience in CPU RTL or a related field with knowledge of microprocessor architecture. - Expertise in CPU system features such as timer synchronization, interrupt controllers, configuration access protocols, RAS and safety mechanisms, telemetry, power management, or debug/trace architecture. - Proficiency in Verilog and/or VHDL, alongside experience with simulators and waveform debugging tools. - Understanding of logic design principles, including timing and power implications.
Nice to have
- Familiarity with RISCV CPU architecture and ISA. - Understanding of low-power microarchitecture techniques and high-performance design strategies. - Experience with scripting languages such as Perl or Python.
This role has been open 162 days — well above the 63-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1084
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1084 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 160 | 1084 |
| Open roles in the wider Digital Design & Verification family | 424 | 3328 · 115 employers |
| Median days open | 60 d | 63 d (−3 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm (this employer) · 160 open roles · median 60 d
- Synopsys · 87 open roles · median 36 d
- AMD · 77 open roles · median 42 d
- Analog Devices · 49 open roles · median 53 d
- NXP Semiconductors · 42 open roles · median 92 d
- NVIDIA · 39 open roles · median 64 d
How we counted: 1084 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.