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Qualcomm

RF/Analog Design/Mixed-Signal Engineering Internship – Summer 2027 - San Diego, California, United States of America

Qualcomm San Diego, California, United States of America; Tempe, Arizona, United States of America; Irvine, United States of America; Santa Clara, United States of America, United States 25 days ago
Analog & Mixed-Signal Design

$17 - $98 USD hourly

Originally posted 18 September 2026 by the employer.

This internship offers project opportunities in 5G/6G mmWave, RF system design, transceiver performance analysis and optimization, RFIC/Analog IC design, PA architectures, RF front-end engineering, signal processing/integration, RF microwave design, power amplifiers, WLAN/Bluetooth LNAs, ADC/DAC.

About the role

This internship focuses on pushing the boundaries of existing technologies to establish new standards in RF/Analog or Mixed-Signal engineering. Project opportunities include 5G/6G mmWave, RFIC/Analog IC design, transceiver performance analysis and optimization, and ADC/DAC.

What you'll do

  • Contribute to projects spanning 5G/6G mmWave, RF system design, and RFIC/Analog IC design.
  • Work on transceiver performance analysis and optimization.
  • Develop and implement PA architectures and RF front-end engineering solutions.
  • Engage with signal processing/integration and RF microwave design.
  • Participate in projects involving power amplifiers, WLAN/Bluetooth LNAs, ADC/DAC.

What you'll need

  • Currently enrolled in a bachelor’s, master’s, or Ph.D. degree program in computer engineering, computer science, electrical engineering, or a related field.
  • Available for 11–14 weeks during Summer 2027 (May–September).
  • Expected graduation date of November 2027 or later.

Nice to have

  • Currently enrolled in a Master’s or PhD degree program in computer engineering, computer science, electrical engineering, or a related field.
  • Anticipated graduation between November 2027 and June 2028.
  • RF, microwave theory, antenna theory.
  • Analog IC design or RFIC design.
  • Electromagnetics, digital pre-distortion, RF matching networks.
  • S-parameters, linear systems, filter design.
  • Digital communication systems, noise figure, linearity (IP3), impedance matching.
  • Memory system design and analysis.
  • High-speed interface system design.
  • Printed circuit board design.
  • Electrical system analysis and modeling.
  • Signal and power integrity (SIPI) analysis.
  • Power delivery network (PDN) design/analysis.
  • Transmission lines, power amplifiers, transmitters, receivers, ACLR.
  • Layout experience and chip tape-out.
  • Programming experience in Perl, MATLAB, Cadence, HFSS.
  • Mixed-signal IP and high-speed interface (ADC/DAC, PLL, sensor, SerDes, DDR) architecture definition, design, implementation, and SoC integration.
  • RTL coding, lint checks, CDC checks, DFT updates, formal equivalency checks, ECO implementation.
  • SERDES (PCIe, USB), memory (DDR, HBM), or 2D/3D die-to-die (D2D) interface system exploration and co-optimization.
  • Static timing analysis and optimization of high-speed critical paths and complex mixed-signal IPs.
  • Cadence design environment.
  • Low-power analog/digital design.
  • Programming experience in Perl, Verilog, Shell, Python, Tcl, SystemVerilog.

Skills: RFIC/Analog IC design, transceiver performance, ADC/DAC, PLL, SerDes

Market context

This role has been open 24 days — well below the 105-day median for Mixed-Signal Design roles.

Mixed-Signal Design · Mixed Signal

Open roles in category
151
Median days open
105 d
Median salary
$176k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Qualcomm compares in Mixed-Signal Design hiring
Metric Qualcomm All employers we track in this specialty (151 roles · 40 employers)
Open roles in this specialty 8 151
Open roles in the wider Analog & Mixed-Signal family 71 1414 · 105 employers
Median days open 71 d 105 d (−34 d vs this employer)
Median salary (USD postings) — $176k

Skills observed across this category: RFIC/Analog IC design, transceiver performance, ADC/DAC, PLL, SerDes

Who's hiring in this category

  • Analog Devices · 22 open roles · median 72 d
  • Infineon Technologies · 13 open roles · median 89 d
  • SiTime · 11 open roles · median 202 d
  • NVIDIA · 9 open roles · median 55 d
  • Qualcomm (this employer) · 8 open roles · median 70 d
  • Broadcom · 7 open roles · median 54 d

How we counted: 151 open Mixed-Signal Design (Mixed Signal) roles from 40 employers tracked in the SemiconductorJobs index, counted 13 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Apply now
San Diego, California, United States of America; Tempe, Arizona, United States of America; Irvine, United States of America; Santa Clara, United States of America, United States
On-site
$17 - $98 USD hourly
25 days ago

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