Originally posted 22 September 2026 by the employer.
This role focuses on owning the rack-level reference design for AI compute platforms.
About the role
This role involves owning the rack-level reference design for AI compute platforms built around many small, energy-efficient accelerators. It focuses on the architecture for packaging, connecting, powering, and cooling thousands of devices in a small volume.
What you'll do
- Own rack-level reference architecture, including board, chassis, backplane, rack topology, mechanical envelope, physical constraints, and serviceability.
- Lead scale-up and scale-out interconnect architecture, including PCIe hierarchy and switching, high-speed Ethernet and SerDes, die-to-die and board-level links, copper versus optical, retimers, connectors, cable plant, topology, and bandwidth/latency budgets.
- Define thermal architecture for high-density racks, covering direct-to-chip and cold-plate cooling, CDUs, manifolds, flow/pressure budgets, component thermal limits, and rack-to-facility interface.
- Develop power delivery architecture, including rack distribution, busbar design, high-voltage DC and 48V-class conversion, transient behavior, redundancy, telemetry, and RAS.
- Conduct joint modeling with the software team on LLM solution partitioning strategy, inter-layer traffic, and collectives, translating into fabric, memory, and topology requirements, backed by quantitative rack- and cluster-level models.
What you'll need
- Bachelor's degree in Electrical Engineering, Mechanical Engineering, Computer Engineering, or a related field with relevant experience in server, datacenter, HPC, or AI system design.
- Demonstrated architecture and design ownership of dense, rack-based server systems taken to production, including authoring specifications for ODM and OEM partners.
- Expert command of removing heat from racks, cooling architecture, cold plates, manifolds, CDUs, flow and thermal budgeting, and the facility-side interface.
- Ability to reason across interconnect, power, thermal, mechanical, and software boundaries, including working with software on model partitioning, with a track record of modeling and trade studies driving architectural decisions.
Nice to have
- Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Computer Engineering, or a related field.
- Hyperscale or OCP experience, including ORv3 and contributions to relevant standards bodies.
- Experience with systems built from many small accelerators, dataflow, or wafer-scale architectures.
- Experience with LLM training or inference at scale and how parallelism strategies stress a fabric, plus familiarity with chiplets, die-to-die interfaces, and advanced packaging.
- Experience carrying a reference design through ODM or CM partners into production and into customer datacenters, including EMC, structural, and shock and vibration qualification.
Skills: rack-level architecture, interconnect, thermal architecture, power delivery, AI system design
This role has been open 17 days — well below the 49-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · SOC Architecture
|
Open roles in category
106
|
Median days open
49 d
|
Median salary
$210k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Mythic | All employers we track in this specialty (106 roles · 28 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 106 |
| Open roles in the wider Software, Firmware & Systems family | 10 | 6035 · 146 employers |
| Median days open | 80 d | 49 d (+31 d vs this employer) |
| Median salary (USD postings) | — | $210k |
Skills observed across this category: rack-level architecture, interconnect, thermal architecture, power delivery, AI system design
Who's hiring in this category
- AMD · 28 open roles · median 51 d
- Qualcomm · 21 open roles · median 39 d
- NVIDIA · 15 open roles · median 65 d
- Intel Corporation · 7 open roles · median 38 d
- Graphcore · 4 open roles · median 60 d
- Mobileye · 4 open roles · median 18 d
How we counted: 106 open Hardware Systems Engineering (SOC Architecture) roles from 28 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.