R&D Engineering, Staff Engineer
Originally posted 16 August 2026 by the employer.
About the role
This role involves the design and optimization of memory circuits, including SRAM bitcells, sense amplifiers, decoders, and peripheral blocks, for advanced process nodes. The position focuses on ensuring the robustness of memory designs through margin analysis and characterization.
What you'll do
- Design and optimize memory circuits, including SRAM bitcells, sense amplifiers, decoders, and peripheral blocks, for advanced process nodes.
- Run SPICE simulations using tools like HSPICE or Spectre to validate circuit performance across PVT corners and operating conditions.
- Perform margin analysis and characterization to ensure robustness of memory designs under voltage, temperature, and process variation.
- Debug circuit-level issues by analyzing simulation results, identifying failure modes, and proposing design fixes.
- Collaborate with verification, layout, and product teams across global sites to close design and characterization loops.
- Document design decisions, characterization results, and analysis flows for the memory IP team.
What you'll need
- BTech or MTech in Electronics Engineering, VLSI Engineering, or equivalent.
- 4 to 6 years of hands-on experience in memory circuit design, characterization, or verification.
- Strong understanding of SRAM, register file, or embedded memory architectures and circuit topologies.
- Proficiency in SPICE simulation tools such as HSPICE, Spectre, or similar for circuit analysis and debug.
- Solid foundation in CMOS fundamentals, device physics, and digital circuit design principles.
Nice to have
- Experience with margin analysis, Monte Carlo simulation, or statistical characterization methods.
- Familiarity with scripting languages like Python, Perl, or TCL for automating simulation and analysis flows.
Skills: memory circuit design, SRAM bitcells, sense amplifiers, SPICE simulations, PVT corners, CMOS fundamentals
This role has been open 48 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 27 | 287 |
| Median days open | 49 d | 69 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: memory circuit design, SRAM bitcells, sense amplifiers, SPICE simulations, PVT corners, CMOS fundamentals
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys (this employer) · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.