R&D Engineering, Staff Engineer
Originally posted 16 April 2026 by the employer — open 155 days.
This role focuses on logic synthesis features and automation flows for advanced EDA tools.
About the role
This role involves designing, developing, and enhancing logic synthesis features and automation flows for advanced EDA tools.
What you'll do
- Design, develop, and enhance logic synthesis features and automation flows for advanced EDA tools.
- Own and maintain synthesis capabilities with direct impact on timing, area, power, and Quality of Results (QoR) optimization.
- Develop and debug solutions across end-to-end EDA flows, understanding interactions between synthesis, place & route, STA, and power analysis tools.
- Analyze and resolve complex customer and internal issues related to timing constraints (SDC), synthesis behavior, and flow integration.
- Collaborate with architecture, verification, QA, and product management teams to deliver integrated, production-quality EDA solutions.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 4–6 years of industry experience in EDA tools, CAD automation, or system-level software development.
- Strong proficiency in C/C++ for large-scale software development and optimization.
- Experience with Tcl, Python, or similar scripting languages for flow automation and customization.
- Hands-on expertise in front-end EDA flows, including RTL design, logic synthesis, and timing constraints (SDC authoring/debugging).
- Solid understanding of digital design fundamentals and ASIC/SoC design methodology.
Skills: logic synthesis features, automation flows, timing constraints (SDC), C/C++, scripting languages
This role has been open 0 days — well below the 86-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
680
|
Median days open
86 d
|
Median salary
$197k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (680 roles · 73 employers) |
|---|---|---|
| Open roles in this specialty | 55 | 680 |
| Open roles in the wider Physical Implementation family | 87 | 1379 · 105 employers |
| Median days open | 57 d | 86 d (−29 d vs this employer) |
| Median salary (USD postings) | — | $197k |
Skills observed across this category: logic synthesis features, automation flows, timing constraints (SDC), C/C++, scripting languages
Who's hiring in this category
- Cadence Design Systems · 173 open roles · median 141 d
- Synopsys (this employer) · 52 open roles · median 58 d
- NVIDIA · 50 open roles · median 90 d
- Micron Technology · 36 open roles · median 119 d
- Qualcomm · 36 open roles · median 72 d
- Intel Corporation · 29 open roles · median 23 d
How we counted: 680 open EDA/CAD Engineering (EDA Tools) roles from 73 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.