R&D Engineering, Sr Staff Engineer
Originally posted 29 October 2026 by the employer.
About the role
This role leads multi-product Silicon IP programs by aligning R&D, business, and customer teams across the full project lifecycle from initial planning through tape-out and delivery.
What you'll do
- Oversee key customer milestones for multi-product programs, ensuring alignment across R&D targets, business goals, and customer objectives.
- Translate technical requirements and customer priorities into scope, executable plans, milestones, dependencies, and risk-mitigation actions.
- Lead global cross-functional teams through the full Silicon IP project lifecycle from initial planning and scoping through tape-out and delivery.
- Establish and manage integrated schedules and milestone tracking using Jira, MS Project, or equivalent platforms.
- Provide executive and customer status reporting, highlighting progress, trade-offs, risks, decisions, and recovery plans while partnering with R&D on product enhancements.
- Analyze project performance metrics, ensure quality assurance standards, maintain customer satisfaction, and manage projects within budgetary constraints.
What you'll need
- Bachelor's or Master's degree in Engineering or Applied Science with 10+ years of experience in semiconductor, ASIC, SOC, or Silicon IP development.
- Proven track record managing customer expectations, communications, and milestone commitments on complex technical programs.
- Background in Mixed-Signal IP, SOC, ASIC, or semiconductor development environments.
- Experience with project management tools and methodologies, including scheduling, risk management, and milestone tracking.
- Familiarity with quality management system processes and procedures in regulated or customer-driven engineering environments.
- Comfort working in Linux environments and navigating engineering toolchains and workflows.
Skills: Program Management, Silicon IP, Milestones, Tape-Out, Jira
More semiconductor jobs: Synopsys jobs · Austin jobs
This role has been open 0 days — well below the 50-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
167
|
Median days open
50 d
|
Category median salary (all employers)
$220k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (167 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 14 | 167 |
| Median days open | 45 d | 50 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $220k |
Skills observed across this category: Program Management, Silicon IP, Milestones, Tape-Out, Jira
Who's hiring in this category
- Qualcomm · 23 open roles · median 60 d
- AMD · 21 open roles · median 35 d
- NVIDIA · 21 open roles · median 46 d
- Synopsys (this employer) · 14 open roles · median 50 d
- NXP Semiconductors · 7 open roles · median 40 d
- Astera Labs · 6 open roles · median 81 d
How we counted: 167 open Technical Program Management (SOC Architecture) roles from 48 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.