R&D Engineering, Sr Engineer
Originally posted 22 September 2026 by the employer.
About the role
This Senior R&D Engineer role focuses on designing and simulating embedded memory circuits, including SRAM, ROM, and Register Files.
What you'll do
- Design and simulate embedded memory circuits, including SRAM, ROM, and Register Files, using Cadence Virtuoso and related tools.
- Support layout activities by working with layout engineers to ensure design intent translates into physical implementation.
- Run bitcell characterization and basic reliability analysis to validate performance across process, voltage, and temperature corners.
- Debug circuit-level issues by analyzing simulation results, identifying root causes, and proposing fixes.
- Collaborate with CAD, verification, and frontend teams to align on design requirements, timing constraints, and integration needs.
- Write and maintain technical documentation, including design notes, simulation reports, and analysis summaries.
- Use scripting in C-Shell, Perl, or Python to automate repetitive tasks and improve design flow efficiency.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related technical field.
- 1 to 3 years of hands-on experience in CMOS circuit design, specifically with embedded memory such as SRAM, ROM, or Register Files.
- Working knowledge of memory architectures, bitcell design, and circuit fundamentals, including read/write operations and sense amplifier behavior.
- Experience using Cadence Virtuoso or similar tools for schematic capture, simulation, and layout interaction.
Nice to have
- Exposure to scripting languages like C-Shell, Perl, or Python.
Skills: embedded memory circuits, SRAM, ROM, Register Files, Cadence Virtuoso, bitcell characterization
This role has been open 11 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 27 | 287 |
| Median days open | 49 d | 69 d (−20 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: embedded memory circuits, SRAM, ROM, Register Files, Cadence Virtuoso, bitcell characterization
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys (this employer) · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.