Quantum Qubit Design Engineer

Originally posted 23 September 2026 by the employer.

About the role

This senior role involves designing, executing, and tapeout of qubit chips, from initial conception through Process-Design-Kit definition and silicon integration, leveraging Intel's 18A process and design infrastructure.

What you'll do

• Establish qubit processes and design rules with lithography, process integration, measurement, and PDK engineers.
• Architect qubit and readout element standard cell design and automation.
• Create qubit and read-out universal process files and qubit level models with TCAD, PDK engineers, and design tool vendors.
• Design automation to enable front end design automation and routing generation for large scale quantum processors.
• Create Automated Place and Route flows, including AI and machine-based learning routing optimization for large I/O counts.
• Drive signal integrity analysis to define routing strategies for large scale qubit processors and define customized PDKs.
• Perform industry standard design validations such as DRC, LVS, and Extraction prior to tapein signoff.
• Co-design Interposer interfaces and routing strategies with Control, Packaging, and System teams for bridging the Qubit processor to ASIC control.
• Tape out electrical characterization test structures to characterize qubit and interconnect performance and yield.

What you'll need

• Bachelor's degree with 4 years of experience, Master's degree with 3 years of experience, or Ph.D. degree in Physics, Electrical Engineering, Cryogenic Engineering, Quantum Technologies, or Quantum Engineering.
• 1+ years experience with Electromagnetic (EM) modeling and simulation tools for signal integrity/crosstalk analysis for high-speed/high-density on-chip/on-package interconnect.
• 1+ years experience with standard cell design, design automation flow implementation (SKILL, VSR, MSOA or equivalent), and universal process file models and extraction.
• 1+ years experience with Digital design tools and APR based routing design, and ability to script and configure APR tools with languages such as TCL.
• 1+ years experience designing and taping out designs on a mainstream foundry process PDK, including running DRC, ERC, LVS, PEX.
• 1+ years experience implementing PDK collateral and design flows to enable and maintain design environments.

Nice to have

• Electrical measurement experience with qubit, quantum devices, transistors, or integrated circuits.
• Process-Integration experience with qubit or CMOS devices or interconnects.
• Experience with dilution refrigerators or other cryogenic systems.
• RFIC design or experience with cryogenic control of qubits.
• Design of superconducting circuits and superconducting interconnects.
• Programming, software, or driver development and scripting for task automation using languages such as Python.
• Implementing Machine Learning or AI based digital design routing algorithms.
• Working with EDA tool vendors to enable customized design solutions.

Skills: qubit, PDK, design automation, tapeout, signal integrity