Quantum Packaging Signal/Power Integrity (SI/PI) Engineer - Oregon, Hillsboro, United States
$141,910 - $200,340 USD yearly
Originally posted 24 September 2026 by the employer.
About the role
This role is responsible for modeling and simulation of packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You will play a crucial role in advancing Intel's silicon quantum dot technology.
What you'll do
- Model and simulate packaging hardware including redistribution layers (e.g., interposers, RDLs), IC substrates, and silicon testchip routing.
- Collaborate with stakeholders to meet design requirements and contribute to creating requirements and novel packaging hardware for pathfinding projects.
- Conduct system-level modeling and end-to-end simulations to ensure designs meet system-level requirements.
- Deliver design milestones and communicate designs through presentations and documentation.
- Stay current with the latest developments in packaging technology and design techniques.
What you'll need
- M.S. degree in Electrical Engineering, Physics or related field AND 3+ years of experience in SI/PI for packaging, silicon testchip, or other related hardware; OR Ph.D. degree in Electrical Engineering, Physics or related field with academic or work experience in the related areas.
- Experience with SI/PI modeling, simulation, and optimization using simulation software such as SIwave, HFSS, ADS.
- Experience with SI/PI/thermal impact on IC substrate design choices.
- Design experience with large form factor IC substrates.
Nice to have
- 1+ years of experience with testchip SI software for large-scale automation (e.g., RaptorH/X).
Skills: Quantum Packaging, Signal/Power Integrity (SI/PI), modeling and simulation of packaging solutions, redistribution layers, IC substrates
This role has been open 0 days — well below the 41-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
67
|
Median days open
41 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (67 roles · 24 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 67 |
| Median days open | 6 d | 41 d (−35 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: Quantum Packaging, Signal/Power Integrity (SI/PI), modeling and simulation of packaging solutions, redistribution layers, IC substrates
Who's hiring in this category
- Micron Technology · 13 open roles · median 146 d
- AMD · 6 open roles · median 30 d
- Marvell Technology · 6 open roles · median 16 d
- Broadcom · 5 open roles · median 166 d
- NVIDIA · 4 open roles · median 56 d
- Amazon · 3 open roles · median 15 d
How we counted: 67 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 24 employers tracked in the SemiconductorJobs index, counted 24 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.