Product Operations Engineer - Mountain View, CA, United States
$200,000 - $285,000 USD yearly
Originally posted 29 June 2026 by the employer.
DensityAI is establishing a product engineering and operations function for advanced-packaging datacenter silicon.
About the role
As a Product Operations Engineer, you will serve as the critical link between design, test, manufacturing, and the customer, owning products from first silicon through qualification, ramp, and sustaining. This role involves establishing the product engineering/operations function for advanced-packaging datacenter silicon.
What you'll do
- Own assigned products across the full lifecycle: new product introduction (NPI), characterization, qualification, ramp, and sustaining.
- Drive yield analysis and improvement, monitoring wafer sort and final test yield, leading failure analysis and root-cause efforts.
- Own the multi-die yield story, including known-good-die (KGD) sorting, die-matching and binning, assembly and packaging yield, and cost-per-package risk.
- Manage test program quality and optimization across wafer sort, final test, and system-level test (SLT), including test time reduction, coverage vs. cost trade-offs, guardbands, and outlier/screening strategies (PAT/SBL/SYL).
- Lead silicon characterization across PVT corners; define spec limits, shmoo analysis, and datasheet correlation.
- Own product qualification (HTOL, HAST, TC, ESD/latch-up, etc.) and reliability sign-off in line with JEDEC standards as applicable.
- Establish and drive production operations: lot dispositioning, capacity and WIP management, binning/grading strategy, and coordination with foundry and OSAT partners.
- Monitor and act on production data using SPC, yield dashboards, and statistical analysis (JMP/Python) to detect excursions and drive corrective action.
- Lead excursion management and 8D/CAPA to contain, root-cause, and resolve manufacturing and quality issues; establish customer-return (RMA/FA) handling.
- Drive cost reduction and continuous improvement initiatives for test time, yield, package, and material costs.
What you'll need
- Bachelor's or Master's in Electrical Engineering, Materials/Semiconductor Engineering, or related field.
- Hands-on experience in semiconductor product engineering, test engineering, or operations for complex digital/SoC/ASIC products.
- Strong understanding of the semiconductor manufacturing flow—wafer fab, wafer sort, assembly, and final test.
- Experience with multi-die / advanced-package product engineering, including known-good-die (KGD) sorting, die-to-package matching and binning, assembly and packaging yield, and cost-per-package management.
- Experience with foundry and OSAT relationships and offshore test/assembly operations.
- Experience with ATE platforms (Advantest, Teradyne) and test program development, debug, and optimization, including system-level test (SLT).
- Solid grounding in yield analysis, statistics, and data analysis—SPC, distributions, correlation; proficiency with JMP, Python, or equivalent.
- Experience with silicon characterization (PVT corners, shmoo, spec setting) and datasheet correlation.
- Working knowledge of product qualification and reliability methodologies (JEDEC).
- Familiarity with DFT/test concepts—scan, MBIST, ATPG patterns, boundary scan—and how they map to production test.
- Knowledge of outlier screening methods (PAT/SBL/SYL) applied to known-good-die (KGD) screening.
- Experience with NPI program management and product ramp/sustaining for advanced-packaging datacenter silicon.
- Familiarity with multi-die package technologies and assembly processes.
- Structured problem-solving / continuous-improvement methodology (8D, CAPA, DOE, or equivalent).
Skills: product lifecycle, yield analysis, qualification, ATE platforms, multi-die, KGD
This role has been open 34 days — well below the 55-day median for Product Engineering roles.
Product Engineering · Yield Engineering
|
Open roles in category
113
|
Median days open
55 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | DensityAI | All employers we track in this specialty (113 roles · 34 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 113 |
| Open roles in the wider Silicon Validation & Test family | 2 | 2224 · 112 employers |
| Median days open | 34 d | 55 d (−21 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: product lifecycle, yield analysis, qualification, ATE platforms, multi-die, KGD
Who's hiring in this category
- Micron Technology · 17 open roles · median 86 d
- Infineon Technologies · 13 open roles · median 50 d
- Texas Instruments · 11 open roles · median 64 d
- onsemi · 8 open roles · median 43 d
- Renesas Electronics · 8 open roles · median 27 d
- AMD · 6 open roles · median 55 d
How we counted: 113 open Product Engineering (Yield Engineering) roles from 34 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.