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Intel Corporation

Product Failure Analysis Engineer - SCAN Design for Test - Oregon, Hillsboro, United States

Intel Corporation US, Oregon, Hillsboro, United States 4 days ago
Product Engineering & Quality

$141,910 - $269,100 USD yearly

Originally posted 7 October 2026 by the employer.

About the role

This role focuses on enabling the success of Intel Foundry's 18A technology through root-cause analysis of silicon failures.

What you'll do

  • Partner with test and validation engineers, circuit designers, wafer fabrication process engineers, and high-volume manufacturing teams to resolve quality issues.
  • Develop new debug tools, methodologies, and technologies to advance silicon debug.
  • Evaluate and resolve component engineering and physical design issues to ensure products incorporate necessary design-for-debug features.
  • Provide expert input on failure analysis investigation areas and design process improvements.

What you'll need

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related STEM discipline with 6+ years of hands-on experience, OR master's degree with 4+ years, OR PhD with 2+ years.
  • Expertise in Design for Test (DFT) tools and techniques, SCAN ATPG methodology, and Scan Chain Diagnosis.
  • Hands-on experience in fault isolation techniques including ATPG pattern generation, fault modeling (stuck-at, transition, path delay, bridging), and Scan architecture (SSN).
  • Experience with Siemens Tessent, Synopsys TestMAX/TetraMAX, Verdi, DVE, simulation and diagnosis tools.
  • Experience developing debug automation and analysis tools using Python, Perl, or TCL.

Nice to have

  • 6+ years of experience with JTAG and validation/debug research methodologies.
  • Experience developing innovative debug tools and methodologies in a research-driven environment.
  • Experience in foundry, fabless semiconductor, or high-volume manufacturing environments supporting customer product bring-up, yield ramp, or production qualification.
Market context

This role has been open 4 days — well below the 47-day median for Failure Analysis Engineering roles.

Failure Analysis Engineering · Failure Analysis

Open roles in category
188
Median days open
47 d
Median salary
$116k
See the full market breakdown ▾Category comparison, and who else is hiring
How Intel Corporation compares in Failure Analysis Engineering hiring
Metric Intel Corporation All employers we track in this specialty (188 roles · 38 employers)
Open roles in this specialty 11 188
Open roles in the wider Process, Fab & Equipment family 174 9738 · 108 employers
Median days open 47 d 47 d (same as this employer)
Median salary (USD postings) — $116k

Who's hiring in this category

  • Micron Technology · 31 open roles · median 104 d
  • Lam Research · 14 open roles · median 35 d
  • GlobalFoundries · 12 open roles · median 19 d
  • Infineon Technologies · 12 open roles · median 43 d
  • Intel Corporation (this employer) · 11 open roles · median 47 d
  • AMD · 10 open roles · median 59 d

How we counted: 188 open Failure Analysis Engineering (Failure Analysis) roles from 38 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.

Apply now
US, Oregon, Hillsboro, United States
On-site
$141,910 - $269,100 USD yearly
4 days ago

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