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Etched

Product Engineer, Silicon Validation - San Jose, United States

Etched San Jose, United States Full-time 6 months ago
Verification, Validation & Test

$24,000 - $24,000 USD yearly

Originally posted 6 May 2026 by the employer.

About the role

This role leads silicon validation, test program development, and productization for large-format AI accelerator chips. You will develop and execute test strategies from first silicon through high-volume manufacturing while managing production quality and cost targets.

What you'll do

- Plan and execute comprehensive silicon characterization from first silicon through production release, including voltage-frequency-temperature characterization, corner testing, guard band determination, and production limit setting. - Architect test flows balancing test time, coverage, and yield learning objectives for AI accelerator designs, driving test cost optimization. - Drive yield improvement initiatives through data-driven root cause analysis and track quality metrics including DPPM and test escapes. - Perform die/package level bring-ups, troubleshoot failure modes, and drive ATE-system correlation activities. - Support OSAT bring-up, manage ATE/SLT manufacturing test program releases, and manage relationships with test vendors, OSAT partners, and foundry partners. - Analyze field return data and system-level failures to identify test coverage gaps and implement improved screening methods.

What you'll need

- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. - 5-10+ years of hands-on experience in silicon validation, product engineering, and ATE test development for advanced node semiconductors. - Proven track record in yield optimization and DPPM reduction with quantifiable results. - Experience with silicon characterization methodologies including Fmax/Vmin characterization and power/thermal validation. - High-volume manufacturing test experience with demonstrated production scale results. - Proficiency in yield and fail pareto analysis using JMP, Exensio, DataPower, or OptimalPlus. - Strong understanding of test program debugging, failure analysis correlation, and yield enhancement techniques.

Nice to have

- Experience developing and optimizing ATE test programs for wafer sort and final test on Advantest V93K platforms. - Experience managing wafer sort and final test across multiple advanced process nodes. - GPU, HPC, or AI accelerator chip testing background with production scale results. - HBM or high-speed memory interface testing and characterization experience. - Experience leading NPI through high-volume production with multi-vendor qualification across multiple OSAT sites. - Experience with multi-site parallel testing strategies and test time optimization for large-format dies. - Scripting and automation skills in Python, Perl, or TCL for test data analysis and workflow automation. - Cross-functional leadership in silicon bring-up and manufacturing ramp.

Skills: silicon characterization, ATE test development, yield optimization, DPPM reduction, silicon bring-up, AI accelerator designs

Market context

This role has been open 171 days — well above the 114-day median for Silicon Test Engineering roles.

Silicon Test Engineering · Silicon Validation

Open roles in category
185
Median days open
114 d
Median salary
$129k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Etched compares in Silicon Test Engineering hiring
Metric Etched All employers we track in this specialty (185 roles · 55 employers)
Open roles in this specialty 3 185
Open roles in the wider Silicon Validation & Test family 10 2238 · 112 employers
Median days open 171 d 114 d (+57 d vs this employer)
Median salary (USD postings) — $129k

Skills observed across this category: silicon characterization, ATE test development, yield optimization, DPPM reduction, silicon bring-up, AI accelerator designs

Who's hiring in this category

  • Teradyne · 14 open roles · median 119 d
  • Qualcomm · 12 open roles · median 114 d
  • Renesas Electronics · 12 open roles · median 107 d
  • Infineon Technologies · 9 open roles · median 122 d
  • Marvell Technology · 9 open roles · median 122 d
  • onsemi · 8 open roles · median 136 d

How we counted: 185 open Silicon Test Engineering (Silicon Validation) roles from 55 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
San Jose, United States
On-site
Full-time
$24,000 - $24,000 USD yearly
6 months ago

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