Applications & FAE
Originally posted 2 October 2026 by the employer.
Work on AMD Adaptive SoC and AI Edge devices.
About the role
This role involves driving customer success on AMD Adaptive SoC and AI Edge devices, serving as a technical point of contact from early design-in through production support. The position is weighted towards silicon debug, focusing on finding and closing issues during customer bring-up and characterization across hardware/software boundaries.
What you'll do
- Own escalated customer support issues from pre-production through production, reproducing failures and driving validated fixes.
- Debug at the register level over JTAG, by boot stage, and against timing reports.
- Integrate and configure processing subsystems, Network-on-Chip, memory controllers (DDR5/6, LPDDR5/6), boot and storage (OSPI, UFS, SD/eMMC), and programmable logic in Vivado and Vitis.
- Author customer documentation set, including product guides, user guides, datasheets, and tutorials, and respond to technical escalations.
- Build and customize embedded Linux images with a Yocto-based Embedded Design Flow, covering BSPs, device trees, kernel, and rootfs tuning.
- Develop RTL in SystemVerilog/Verilog and prove it on hardware, including test design, automation, and results analysis.
What you'll need
- Passion for system architecture, silicon debug, and embedded systems design.
- Experience across the full stack, from memory controller specifications and timing reports to building Linux images from source.
- Ability to root-cause failures across processing subsystems, interconnect, memory, and boot path.
- Experience reproducing and isolating functional failures across hardware, firmware, and software boundaries.
- Strong RTL fundamentals in SystemVerilog, Verilog, and/or VHDL.
- Excellent technical writing for customer-facing documentation.
Nice to have
- Extensive hands-on experience with FPGA/SoC platforms in a silicon debug, applications, validation, or systems engineering role.
- Working knowledge of end-to-end SoC architecture: processing subsystems, on-chip interconnect, memory controllers (DDR5/6, LPDDR5/6) with scheduling, arbitration, and QoS behavior, boot and storage blocks (OSPI, UFS, SD/eMMC), and programmable logic.
- Proven functional failure debug on real hardware using register-level JTAG debug (xsdb or equivalent), serial console, ILA, oscilloscopes, and logic analyzers.
- AMD/Xilinx FPGA experience with strong skills in Vivado or an equivalent FPGA toolchain.
- Hands-on experience with embedded Linux flows: building and customizing images with a Yocto-based flow such as PetaLinux or the Embedded Design Flow (BSPs, device trees, kernel configuration, custom recipes and layers).
- Linux kernel and driver knowledge covering UIO and character drivers, interrupt routing, reserved memory, and real-time scheduling.
- Strong C/C++ for application and bare-metal programming on embedded processors.
- Automation in Python, Tcl, and Shell.
- Working knowledge of clocking, CDC, timing closure, and static timing analysis, with ability to debug timing violations.
- Proven experience in performance analysis and tuning on real hardware; or boot and configuration flows on FPGA or SoC platforms, including boot image generation, platform management firmware, secure boot, bootloaders, and runtime reconfiguration of programmable logic.
- Demonstrated use of AI in engineering workflows, applying AI/LLM/ML tools to identify design gaps, summarize collected data, and drive productivity in debug, automation, and documentation.
Skills: customer support, silicon debug, embedded Linux, FPGA/SoC platforms, SystemVerilog, JTAG debug