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Astera Labs

Product Applications Engineer (NCG 2026) - San Jose, California, United States

Astera Labs San Jose, California, United States 4 months ago
Applications & FAE

$140,000 - $150,000 USD yearly

Originally posted 16 June 2026 by the employer.

Help enable Leo CXL Smart Memory Controllers across hyperscale platforms using C, Python, and high-speed PCIe and DDR subsystems.

About the role

As a Firmware Product Application Engineer, you will work at the intersection of firmware engineering and customer-facing technical engagement. You will help enable Leo CXL Smart Memory Controllers at hyperscale customers and OEM partners, assisting with firmware bring-up, validation, and customer issue resolution from early silicon through production ramp.

What you'll do

- Assist with customer engagements for Leo CXL Smart Memory Controllers, including bring-up support, feature enablement, and issue triage on customer platforms. - Develop, validate, and debug firmware using C and Python across PCIe/CXL and DDR memory subsystems. - Assist with end-to-end firmware validation of DDR4/DDR5 DRAM interfaces, including initialization, training, RAS features, and performance tuning. - Collaborate with cross-functional teams across firmware engineering, hardware, systems, and product management to deliver firmware releases and collateral. - Develop and maintain Python-based test scripts, automation frameworks, and diagnostic tools to support validation and customer debug workflows. - Author technical documentation, including application notes, release notes, and design guides.

What you'll need

- Bachelor's degree in Electrical Engineering, Computer Science, or a related technical field. - Proficiency in C for embedded firmware development in RTOS environments. - Proficiency in Python for scripting, test automation, and diagnostic tooling. - Knowledge of firmware bring-up, debug, and validation of memory or I/O subsystems on server platforms. - Familiarity with SoC interfaces, including DDR controllers, PCIe controllers, and on-chip memory subsystems. - Knowledge of developer workflows including SCM (preferably Git), code reviews, and CI/CD pipelines. - Technical writing skills for generating application notes and customer-facing collateral. - Authorization to work in the US.

Nice to have

- Master's degree in Electrical Engineering, Computer Science, or a related technical field. - Working knowledge of CXL (Compute Express Link) specifications (CXL 1.1/2.0/3.0), including memory expansion, pooling, and sharing concepts. - Experience with PCIe endpoint firmware across PHY, Link, and Transaction layers, including PCIe enumeration, MSI/MSI-X, SR-IOV, and error handling. - Knowledge of high-speed memory interfaces such as DDR4 and/or DDR5 DRAM, including initialization sequences, training algorithms, timing margins, and ECC/RAS features. - Hands-on experience with PCIe/CXL protocol analyzers, BERT, and other lab debug equipment. - Familiarity with BIOS/BMC/OS interactions with PCIe/CXL devices and MMIO/RAS concepts. - Experience with server memory performance tuning, including latency and bandwidth optimization. - Prior customer-facing or field applications experience in a semiconductor or systems company.

Skills: firmware, C, Python, CXL, DDR4/DDR5, PCIe

Market context

This role has been open 129 days — well above the 58-day median for Applications FAE roles.

Applications FAE · Serdes Highspeed

Open roles in category
92
Median days open
58 d
Median salary
$183k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Astera Labs compares in Applications FAE hiring
Metric Astera Labs All employers we track in this specialty (92 roles · 23 employers)
Open roles in this specialty 16 92
Median days open 70 d 58 d (+12 d vs this employer)
Median salary (USD postings) — $183k

Skills observed across this category: firmware, C, Python, CXL, DDR4/DDR5, PCIe

Who's hiring in this category

  • Astera Labs (this employer) · 16 open roles · median 69 d
  • Synopsys · 16 open roles · median 37 d
  • Keysight Technologies · 11 open roles · median 44 d
  • Qualcomm · 8 open roles · median 75 d
  • Microchip Technology · 7 open roles · median 43 d
  • Marvell Technology · 5 open roles · median 181 d

How we counted: 92 open Applications FAE (Serdes Highspeed) roles from 23 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Apply now
San Jose, California, United States
On-site
$140,000 - $150,000 USD yearly
4 months ago

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