$185,000 - $240,000 USD yearly
Originally posted 19 August 2026 by the employer.
About the role
As a Principal Product Application Engineer, you will provide technical guidance to customers to overcome design challenges, generate collateral, and support the development, debugging, and design-in of semiconductor products for PCIe/CXL. In this regional lead role supporting the China region, you will coordinate customer technical engagements with development teams at Astera Labs headquarters.
What you'll do
- Provide technical guidance to customers to overcome design challenges and support design-in activities for PCIe/CXL semiconductor products.
- Generate technical collateral for existing and new products.
- Execute silicon/system bring-up and debug in customer systems.
- Take technical ownership of issue resolution, directing internal engineering teams and communicating with customers, FAEs, and sales teams.
- Provide feedback to internal engineering teams to improve products and processes.
What you'll need
- Bachelor’s degree in Electrical Engineering (Master’s preferred).
- 8+ years of experience supporting the development and design-in of semiconductor products, with a minimum of 3 years' experience designing in complex SoC/silicon products with high-speed interfaces.
- Full professional proficiency in Mandarin (written and spoken) to communicate directly with Asia region customer contacts.
- Strong working knowledge of PCIe LTSSM at a physical layer level, associated standards, and debug, with recent experience on PCIe 5.0 at a minimum.
- Firsthand experience with lab equipment such as protocol analyzers/exercisers, high-speed oscilloscopes, or BERTs.
- Experience with software/firmware associated with semiconductor products, including firmware development with C-language and scripting with Python or equivalent programming languages.
Nice to have
- Experience with PCIe 6.0/CXL.
- Experience triaging complex customer-reported issues spanning silicon, firmware, hardware board design, and system environments.
- Experience with common data center BMC implementation and BIOS configuration.
- Development or support experience for PCIe or Ethernet Switch or Retimer products.
- PCIe compliance testing methodology and troubleshooting experience.
- Understanding of data center systems such as servers, JBOGs/JBODs, and networking switches/routers/interconnects.
- Availability to work approximately from 12:00 PM to 9:00 PM PST for real-time collaboration with stakeholders in the Asia Pacific time zone.
Skills: PCIe/CXL, technical guidance, design-in, silicon/system bring-up, protocol analyzers
More semiconductor jobs: Astera Labs jobs · Field applications engineer jobs · San Jose jobs
First seen in our index 83 days ago, well above the 70-day median for Applications FAE roles.
Applications FAE · Serdes Highspeed
|
Open roles in category
93
|
Median days since first seen
70 d
|
Category median salary (all employers)
$182k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (93 roles · 21 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 93 |
| Median days since first seen | 88 d | 70 d (−18 d vs this employer) |
| Median salary (USD postings) | n/a | $182k |
Skills observed across this category: PCIe/CXL, technical guidance, design-in, silicon/system bring-up, protocol analyzers
Who's hiring in this category
- Astera Labs (this employer) · 13 open roles · median 87 d
- Synopsys · 12 open roles · median 55 d
- Keysight Technologies · 11 open roles · median 28 d
- MACOM · 9 open roles · median 13 d
- Qualcomm · 8 open roles · median 93 d
- Microchip Technology · 6 open roles · median 57 d
How we counted: 93 open Applications FAE (Serdes Highspeed) roles from 21 employers tracked in the SemiconductorJobs index, counted 10 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Days are counted from when our index first saw each posting, not from the employer's original posting date.