Principle Analog and Mixed Signal Design Enineer
$140,000 - $260,000 USD yearly
About the role
The Principle Analog IC Design Engineer is responsible for designing and developing analog and mixed-signal circuits from initial concept and specification through final verification to ensure conformance with customer requirements.
What you'll do
- Design and develop analog and mixed-signal integrated circuits from initial concept and specification through final verification.
- Develop CMOS SerDes and high-speed I/O circuit blocks, including transmitters, receivers, serializers, deserializers, and clock distribution networks.
- Design low-jitter PLLs, phase interpolators, bias circuits, and voltage regulators.
- Implement jitter and signal-equalization techniques across high-speed architectures.
- Utilize CAD tools to perform circuit simulation, layout, and physical verification.
What you'll need
- Master’s degree or Ph.D. in electrical engineering.
- At least seven years of experience designing and developing CMOS SerDes or high-speed I/O integrated circuits.
- Design experience with transmitters, receivers, serializers, deserializers, phase interpolators, low-jitter PLLs, high-speed clock-distribution circuits, bias circuits, and voltage regulators.
- Understanding of jitter and signal-equalization techniques.
- Proficiency with CAD tools for circuit simulation, layout, and physical verification.
Nice to have
- Working knowledge of common SerDes standards and their electrical requirements.
- Experience with Cadence design tools and laboratory testing.
- Design experience at data rates above 10 Gbps and in process technologies below 28 nm.
Skills: SerDes, high-speed I/O, PLL, equalization, Cadence, jitter
More semiconductor jobs: Cadence Design Systems jobs · Signal integrity jobs
First seen in our index 0 days ago, well below the 58-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
262
|
Median days since first seen
58 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (262 roles · 53 employers) |
|---|---|---|
| Open roles in this specialty | 22 | 262 |
| Open roles in the wider Analog & Mixed-Signal family | 38 | 1563 · 118 employers |
| Median days since first seen | 149 d | 58 d (−91 d vs this employer) |
| Median salary (USD postings) | n/a | $206k |
Skills observed across this category: SerDes, high-speed I/O, PLL, equalization, Cadence, jitter
Who's hiring in this category
- Synopsys · 41 open roles · median 41 d
- AMD · 21 open roles · median 45 d
- Cadence Design Systems (this employer) · 21 open roles · median 157 d
- Qualcomm · 20 open roles · median 86 d
- NVIDIA · 18 open roles · median 218 d
- Micron Technology · 11 open roles · median 51 d
How we counted: 262 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 53 employers tracked in the SemiconductorJobs index, counted 13 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Analog & Mixed-Signal family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.