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Marvell Technology

Principal Validation and Hardware Design Engineer (SerDes) - Santa Clara, CA, United States

Marvell Technology Santa Clara, CA, United States 5 months ago
Digital Design & SoC Architecture

Originally posted 29 May 2026 by the employer.

About the role

This role leads the generation, review, and execution of bring-up and validation plans within Marvell's Optical Digital Signal Processing (ODSP) validation team. The position focuses on silicon validation for SerDes and high-speed interfaces supporting optical interconnects in datacenter and AI architectures.

What you'll do

  • Lead the generation, review, and refinement of bring-up and validation plans for Marvell's products.
  • Create and review test plans, execute validation strategies, and prepare test result documentation.
  • Partner with Design, Firmware, and Validation teams to debug issues and determine root causes of bugs.
  • Work with chip designers and system engineers to execute system marginality validation and identify issues.
  • Guide engineering teams and contribute to validation strategy through independent technical decision-making.

What you'll need

  • Bachelor of Electrical Engineering with 8+ years of relevant experience, or Ph.D. in Electrical Engineering with 5+ years of relevant experience.
  • Technical silicon validation experience in SerDes, high-speed interface design, and system marginality validation.
  • Minimum of 3 years of experience serving as a project lead.
  • Experience developing test scripts in Python.
  • Detailed, working knowledge of lab equipment including Oscilloscopes, Function Generators, Spectrum Analyzers, and BERTs.

Nice to have

  • Knowledge of mathematical programming tools such as Matlab.
  • Experience reviewing PCB schematics and debugging PCBs.
  • Knowledge of wireline communication theory and physical layer specifications such as IEEE 802.3 and Common Electrical Interface.
  • Technical understanding of high-speed I/O, Transceiver, Transmitter, or Receiver architectures.
Market context

This role has been open 147 days — well above the 51-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · AI ML Hardware

Open roles in category
1017
Median days open
51 d
Median salary
$154k
See the full market breakdown ▾Category comparison, and who else is hiring
How Marvell Technology compares in Hardware Systems Engineering hiring
Metric Marvell Technology All employers we track in this specialty (1017 roles · 102 employers)
Open roles in this specialty 26 1017
Open roles in the wider Software, Firmware & Systems family 79 6277 · 144 employers
Median days open 27 d 51 d (−24 d vs this employer)
Median salary (USD postings) — $154k

Who's hiring in this category

  • Intel Corporation · 75 open roles · median 36 d
  • KLA Corporation · 63 open roles · median 50 d
  • Teradyne · 61 open roles · median 36 d
  • NVIDIA · 51 open roles · median 68 d
  • Applied Materials · 48 open roles · median 67 d
  • AMD · 43 open roles · median 53 d

How we counted: 1017 open Hardware Systems Engineering (AI ML Hardware) roles from 102 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

Apply now
Santa Clara, CA, United States
On-site
5 months ago

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