Principal Test Development Engineer (ATE) - Santa Clara, CA, United States
Originally posted 27 June 2026 by the employer.
Lead ATE test program development for AI Compute platforms, Server, and Network Processors on Advantest 93K and Teradyne UltraFLEX platforms.
About the role
As a Principal Test Development Engineer on the New Product Introduction (NPI) test engineering team, you will develop ATE test solutions for characterization, production, and wafer sort. The role focuses on advanced products including AI Compute platforms, Server, and Network Processors.
What you'll do
- Lead the development of ATE test solutions for characterization, production, and wafer sort on Advantest 93K and/or Teradyne tester platforms. - Create detailed test plans and methodology documentation aligned with product specifications and quality requirements. - Participate in testability and test plan reviews with DFx and Design teams to define and enhance yield and test methodologies. - Translate simulation test patterns into ATE-ready test programs to support handoff from design validation to high-volume manufacturing. - Optimize test flows by reducing test times, removing unnecessary steps, improving yields, and releasing production test programs with product engineers.
What you'll need
- Bachelor’s degree in Electrical Engineering or related field with 10-15 years of related professional experience, or a Master’s/PhD with 5-10 years of experience. - Minimum 6+ years of test program development experience on Advantest 93K and/or Teradyne UltraFLEX ATE tester platforms. - Demonstrable experience in ATE testing, test methodology, silicon process, DFT/DFM, and high-speed digital testing. - Strong knowledge of C/C++, Perl, Python, Java, and Linux environments.
This role has been open 116 days — slightly above the 113-day median for Silicon Test Engineering roles.
Silicon Test Engineering · Silicon Validation
|
Open roles in category
192
|
Median days open
113 d
|
Median salary
$129k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (192 roles · 57 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 192 |
| Open roles in the wider Silicon Validation & Test family | 59 | 2244 · 112 employers |
| Median days open | 119 d | 113 d (+6 d vs this employer) |
| Median salary (USD postings) | — | $129k |
Who's hiring in this category
- Teradyne · 14 open roles · median 116 d
- Qualcomm · 12 open roles · median 111 d
- Renesas Electronics · 12 open roles · median 104 d
- onsemi · 10 open roles · median 137 d
- Infineon Technologies · 9 open roles · median 119 d
- Marvell Technology (this employer) · 9 open roles · median 119 d
How we counted: 192 open Silicon Test Engineering (Silicon Validation) roles from 57 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.