Principal SOC Architect, AI Accelerators (Multiple Locations - Remote
$200,000 - $300,000 USD yearly
Originally posted 20 October 2026 by the employer.
Work on datacenter AI accelerators across RAS, virtualization, and confidential compute architecture from card to full-rack scale.
About the role
Qualcomm is looking for an experienced SoC architect to work on AI products in the datacenter, spanning security, RAS, and/or virtualization. The role defines architecture and drives requirements from the card and server level up to a full rack.
What you'll do
- Define SOC architecture for at least one or more areas across RAS, virtualization, and security. - Drive reliability analysis of card, server, and rack-level systems, designing for serviceability and implementing HW/SW failure mitigation techniques. - Architect virtualization capabilities supporting multiple clients via VMs on the same hardware platform while maintaining security and isolation. - Develop architectures for confidential compute and related security enhancements based on datacenter requirements. - Analyze AI server deployments in datacenters and collaborate with customers and ODMs to determine hardware and software requirements.
What you'll need
- Bachelor's degree in Science, Engineering, or a related field with 8+ years of ASIC design, verification, validation, integration, or related experience (or Master's degree with 7+ years, or PhD with 6+ years). - 10 years of HW design, testing, and commercialization experience. - 3 years of experience working on datacenter-related products such as servers and accelerators. - In-depth knowledge of datacenter security, RAS, virtualization, telemetry, power, cooling, lifecycle, and deployments. - Working knowledge of scale-up and scale-out architectures.
Nice to have
- Experience defining RAS infrastructure at the server SoC level. - Experience and knowledge of server SoC security, specifically in confidential compute, or participation in the OCP Security Forum or Confidential Compute Forum. - Experience and knowledge of PCIe protocol spanning SRIOV, SIOV, IDE, and TDISP. - Knowledge of Ethernet protocols with an emphasis on error recovery and virtualization. - Experience collaborating with Product Marketing and datacenter customers to define security, RAS, and virtualization requirements.
Skills: SoC Architecture, AI Accelerators, Datacenter, RAS, Virtualization
This role has been open 0 days — well below the 81-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
470
|
Median days open
81 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (470 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 76 | 470 |
| Open roles in the wider Digital Design & Verification family | 398 | 3244 · 116 employers |
| Median days open | 87 d | 81 d (+6 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: SoC Architecture, AI Accelerators, Datacenter, RAS, Virtualization
Who's hiring in this category
- Qualcomm (this employer) · 73 open roles · median 90 d
- NVIDIA · 56 open roles · median 71 d
- Apple · 36 open roles · median 14 d
- AMD · 34 open roles · median 62 d
- Arm Holdings · 27 open roles · median 117 d
- Micron Technology · 22 open roles · median 109 d
How we counted: 470 open SoC/Chip Architecture (SOC Architecture) roles from 66 employers tracked in the SemiconductorJobs index, counted 20 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.