Principal / Senior Principal Electrical Design Engineer - San Jose, California, United States
$185,000 - $240,000 USD yearly
Originally posted 19 October 2026 by the employer.
About the role
Define and drive the architecture, design, and technical strategy for advanced board-level hardware across networking and high-performance connectivity platforms. Scope encompasses complex hardware systems including chassis boards, NIC cards, PCIe Gen6 platforms, and 800G Ethernet products.
What you'll do
- Define and own the board-level hardware architecture, stack-up strategy, and technical roadmap across multiple product lines and platform generations. - Own power delivery architecture strategy, including multi-rail regulation topologies, advanced sequencing schemes, transient response optimization, protection philosophies, and power budgeting. - Own schematic capture and board-level design for complex multi-layer PCBs integrating high-speed digital, analog, and mixed-signal circuitry. - Define hardware implementation strategies for management and control interfaces such as I2C, SPI, GPIO, and MDIO, along with debug and observability architectures. - Direct bring-up and validation strategies, leading root-cause analysis on complex hardware issues across high-speed interfaces, power delivery, clocks, resets, and control paths. - Partner with SI/PI, mechanical, thermal, firmware, system, and manufacturing teams to drive DFT, DFM, DFR, and overall production readiness.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering or a closely related field. - 12+ years of progressive hardware design experience with board-level electrical engineering and technical leadership across multiple product generations. - Experience architecting and delivering production hardware for server, networking, storage, or high-performance compute systems at scale. - Hands-on experience with high-speed SerDes-based systems supporting Ethernet, PCIe, PCIe Gen5/Gen6, and 400G/800G Ethernet system design. - Deep understanding of signal integrity fundamentals (impedance control, differential pair routing, channel loss optimization, crosstalk mitigation) and power integrity/PDN design (advanced sequencing, decoupling strategies, transient response optimization). - Proficiency with schematic capture and PCB design review tools such as Cadence Allegro or OrCAD, alongside hands-on lab bring-up using oscilloscopes and protocol analyzers.
Nice to have
- Experience defining architecture for NIC cards, accelerator cards, or PCIe add-in card platforms across multiple generations. - Experience leading server chassis or system board design programs in dense, thermally constrained, high-availability environments. - Expertise with 800G Ethernet and emerging 1.6T electrical interfaces, retimers, redrivers, and advanced clocking architectures. - Experience with compliance and validation workflows for PCIe and Ethernet platforms, including contributions to industry specifications or standards bodies. - Scripting proficiency in Python or similar languages for lab automation, measurement analysis, and hardware characterization workflows. - Experience driving contract manufacturer relationships, production ramp strategies, and yield optimization.
Skills: board-level hardware architecture, high-speed system design, PCIe Gen6 platforms, 800G Ethernet products, signal integrity, power delivery architecture
This role has been open 0 days — well below the 106-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · Serdes Highspeed
|
Open roles in category
90
|
Median days open
106 d
|
Median salary
$200k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (90 roles · 35 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 90 |
| Open roles in the wider Software, Firmware & Systems family | 13 | 6166 · 145 employers |
| Median days open | 20 d | 106 d (−86 d vs this employer) |
| Median salary (USD postings) | — | $200k |
Skills observed across this category: board-level hardware architecture, high-speed system design, PCIe Gen6 platforms, 800G Ethernet products, signal integrity, power delivery architecture
Who's hiring in this category
- NVIDIA · 14 open roles · median 47 d
- Qualcomm · 9 open roles · median 193 d
- AMD · 5 open roles · median 125 d
- Keysight Technologies · 4 open roles · median 146 d
- Lightmatter · 4 open roles · median 93 d
- Synopsys · 4 open roles · median 18 d
How we counted: 90 open Hardware Systems Engineering (Serdes Highspeed) roles from 35 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.